US5091759A
Expired / Lapsed
US
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Heterostructure field effect transistor
Assignee: Texas Instruments Inc
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Filing: 1990-11-26
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Granted: 1992-02-25
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Expires: 2010-11-26
Abstract
Abstract A heterostructure field effect transistor having a buffer layer comprising a first compound semiconductor material. A layer of second semiconductor material different from the first material is formed over the buffer layer. The second layer has a total thickness less than 250 Å. A doped third semiconductor layer formed over the second layer. The net has a dopant concentration in the second layer is greater than the net dopant concentration in the third layer. A gate layer is positioned over the third layer. In a preferred embodiment the second layer is a pulse-doped pseudeomorphic material. There is also provided a method for making the heterostructure field effect transistor. A doped pseudomorphic semiconductor layer of a first conductivity type is formed between first and second other semiconductor layers, the second layer including a net dopant concentration of the first conductivity type. A Schottky gate electrode is formed in contact with the second layer.
Inventors
- 👤 Hung-Dah Shih
- 👤 Bumman Kim
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 05:53
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/40; H10D30/47; H10D30/471; H10D30/473; H10D30/4732; H10D30/204
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
131 words
A MESFET comprising: (a) a semi-insulating region having a first buffer layer of a first compound semiconductor material along a surface thereof; (b) a second region including a second compound semiconductor material different from said first compound semiconductor material, said second region including a central doped portion therein, said second region disposed over and contiguous with said buffer layer, said second region having a total thickness less that 250 Angstroms; (c) a third region of compound semiconductor material disposed over said second region, the net dopant concentration in said second region exceeding the net dopant concentration is said third region; and (d) a fourth gate region positioned over said third region to provide a quantum well in said doped second region and a conduction channel region in said central doped portion.
Claim 2
Dependent Claim
131 words
A MESFET comprising: (a) a semi-insulating region having a first buffer layer of a first compound semiconductor material along a surface thereof; (b) a second region including a second compound semiconductor material different from said first compound semiconductor material, said second region including a central doped portion therein, said second region disposed over and contiguous with said buffer layer, said second region having a total thickness less that 250 Angstroms; (c) a third region of compound semiconductor material disposed over said second region, the net dopant concentration in said second region exceeding the net dopant concentration is said third region; and (d) a fourth gate region positioned over said third region to provide a quantum well in said doped second region and a conduction channel region in said central doped portion.
Claim 3
Dependent Claim
25 words
The device of claim 1 wherein said gate region is recessed to offset surface change when forming a depletion region in said third semiconductor layer.
Claim 4
Dependent Claim
28 words
The device of claim 2 wherein said doped second region of second semiconductor material includes a total sheet carrier density of at least 10 12 cm -2 .
Claim 5
Dependent Claim
17 words
The device of claim 2 wherein said region of second semiconductor material includes a pulse doped layer.
Claim 6
Dependent Claim
32 words
The device of claim 4 wherein the dopant concentration of said pulse doped layer is approximately 10 19 cm -3 and other portions of said region of second material are substantially undoped.
Claim 7
Dependent Claim
20 words
The device of claim 2 wherein said region of second material is pseudomorphic, elastically accommodating lattice mismatch with adjacent layers.
Claim 8
Dependent Claim
20 words
The device of claim 6 wherein said third region be formed of the same semiconductor material as the buffer layer.
Claim 9
Dependent Claim
26 words
The device of claim 2 wherein said buffer layer and said third region comprise GaAs and said region of second semiconductor material is formed of InGaAs.
Claim 10
Dependent Claim
23 words
The device of claim 8 wherein said InGaAs layer includes an n type pulse doped layer of 10 19 cm -3 impurity concentration.
Claim 11
Dependent Claim
16 words
The device of claim 2 wherein said gate region is doubly recessed in said third layer.
Claim 12
Dependent Claim
17 words
The device of claim 1 wherein said buffer layer is undoped and said third region is doped.
Claim 13
Dependent Claim
15 words
The device of claim 4 wherein the pulse doped layer s approximately 50 Angstoms thick.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-02-24 | 1995-08-26 | 1996-02-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-02-24 | 1999-08-26 | 2000-02-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-02-24 | 2003-08-26 | 2004-02-25 | $7700.00 | Window Closed / Lapsed |