US4511408A
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Semiconductor device fabrication with disordering elements introduced into active region
Assignee: University of Illinois System
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Filing: 1982-04-22
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Granted: 1985-04-16
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Expires: 2002-04-22
Abstract
Abstract Silicon or krypton is used as a disordering element to selectively disorder layers in a heterojunction III-V semiconductor.
Inventors
- 👤 Nick Holonyak, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 17:58
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/202; H10P30/206; H01; H01S; H01S5/00; H01S5/02; H01S5/026; H10P14/00; H10P14/20; H10P14/38; H10P14/3824; H10P30/208; H10W; H10W10/00; H10W10/01; H01S5/20; H01S5/2054; H01S5/2059
Claims Analysis
Total Claims: 70
Claim 1
Independent Claim
70 words
A method for converting a multilayer semiconductor structure, which comprises first active semiconductor regions interposed between second semiconductor barrier layers, into a disordered alloy of both said first and second semiconductors, said alloy exhibiting a higher energy gap than said first active semiconductor region; the method comprising introducing a disordering element into said multilayer structure, said disordering element being an element selected from the group consisting of silicon and krypton.
Claim 2
Independent Claim
70 words
A method for converting a multilayer semiconductor structure, which comprises first active semiconductor regions interposed between second semiconductor barrier layers, into a disordered alloy of both said first and second semiconductors, said alloy exhibiting a higher energy gap than said first active semiconductor region; the method comprising introducing a disordering element into said multilayer structure, said disordering element being an element selected from the group consisting of silicon and krypton.
Claim 3
Dependent Claim
22 words
The method as defined by claim 1, wherein said introducing of a disordering element comprises implantation of ions into said multilayer structure.
Claim 4
Dependent Claim
16 words
The method as defined in claim 1, wherein said first and second semiconductors are III-V semiconductors.
Claim 5
Dependent Claim
32 words
The method as defined by claim 1, further comprising annealing said multilayer structure, after introduction of said disordering element, at a temperature in the range between about 500° C. and 700° C.
Claim 6
Dependent Claim
22 words
The method as defined by claim 1, wherein the thickness of said first active semiconductor region is less than about 500 Angstroms.
Claim 7
Dependent Claim
22 words
The method as defined by claim 1, wherein the thickness of said first active semiconductor region is less than about 200 Angstroms.
Claim 8
Dependent Claim
15 words
The method as defined by claim 1, wherein said first active semiconducting region is GaAs.
Claim 9
Dependent Claim
28 words
The method as defined by claim 1, further including the additional step of bombarding said structure, after said introduction of a disordering element, with a source of protons.
Claim 10
Dependent Claim
16 words
The method as defined by claim 2, wherein said first and second semiconductors are III-IV semiconductors.
Claim 11
Dependent Claim
22 words
The method as defined by claim 2, wherein the thickness of said first active semiconductor region is less than about 500 Angstroms.
Claim 12
Dependent Claim
22 words
The method as defined by claim 2, wherein the thickness of said first active semiconductor region is less than about 200 Angstroms.
Claim 13
Dependent Claim
15 words
The method as defined by claim 2, wherein said first active semiconducting region is GaAs.
Claim 14
Dependent Claim
28 words
The method as defined by claim 2, further including the additional step of bombarding said structure, after said introduction of a disordering element, with a source of protons.
Claim 15
Dependent Claim
32 words
The method as defined by claim 3, further comprising annealing said multilayer structure, after introduction of said disordering element, at a temperature in the range between about 500° C. and 700° C.
Claim 16
Dependent Claim
32 words
The method as defined by claim 9, further comprising annealing said multilayer structure, after introduction of said disordering element, at a temperature in the range between about 500° C. and 700° C.
Claim 17
Dependent Claim
22 words
The method as defined by claim 9, wherein the thickness of said first active semiconductor region is less than about 500 Angstroms.
Claim 18
Dependent Claim
22 words
The method as defined by claim 9, wherein the thickness of said first active semiconductor region is less than about 200 Angstroms.
Claim 19
Dependent Claim
22 words
The method as defined by claim 15, wherein the thickness of said first active semiconductor region is less than about 500 Angstroms.
Claim 20
Dependent Claim
22 words
The method as defined by claim 15, wherein the thickness of said first active semiconductor region is less than about 200 Angstroms.
Claim 21
Dependent Claim
28 words
The method as defined by claim 5, further including the additional step of bombarding said structure, after said introduction of a disordering element, with a source of protons.
Claim 22
Dependent Claim
15 words
The method as defined by claim 16, wherein said first active semiconducting region is GaAs.
Claim 23
Dependent Claim
15 words
The method as defined by claim 17, wherein said first active semiconducting region is GaAs.
Claim 24
Dependent Claim
15 words
The method as defined by claim 7, wherein said second semiconductor barrier layer is AlAs.
Claim 25
Dependent Claim
19 words
The method as defined by claim 7, wherein said second semiconductor barrier layer is Al x Ga 1-x As.
Claim 26
Dependent Claim
15 words
The method as defined by claim 12, wherein said second semiconductor barrier layer is AlAs.
Claim 27
Dependent Claim
19 words
The method as defined by claim 12, wherein said second semiconductor barrier layer is Al x Ga 1-x As.
Claim 28
Dependent Claim
15 words
The method as defined by claim 21, wherein said second semiconductor barrier layer is AlAs.
Claim 29
Dependent Claim
19 words
The method as defined by claim 21, wherein said second semiconductor barrier layer is Al x Ga 1-x As.
Claim 30
Dependent Claim
15 words
The method as defined by claim 22, wherein said second semiconductor barrier layer is AlAs.
Claim 31
Dependent Claim
19 words
The method as defined by claim 22, wherein said second semiconductor barrier layer is Al x Ga 1-x As.
Claim 32
Independent Claim
109 words
A method for integrating semiconductor devices into a monolithic structure, at least some of said devices being light emitting and including heterojunction multilayer structure, comprising the steps of: constructing a heterojunction light emitting semiconductor device which includes multiple layers of interspersed active and barrier semiconductor regions, said active regions being less than about 500 Angstroms in thickness; masking portions of said device; and introducing a disordering element into unmasked portions of said device to cause said active and barrier regions to compositionally disorder to a higher energy gap material than said active semiconductor regions, said disordering element comprising an element selected from the group consisting of silicon and krypton.
Claim 33
Independent Claim
109 words
A method for integrating semiconductor devices into a monolithic structure, at least some of said devices being light emitting and including heterojunction multilayer structure, comprising the steps of: constructing a heterojunction light emitting semiconductor device which includes multiple layers of interspersed active and barrier semiconductor regions, said active regions being less than about 500 Angstroms in thickness; masking portions of said device; and introducing a disordering element into unmasked portions of said device to cause said active and barrier regions to compositionally disorder to a higher energy gap material than said active semiconductor regions, said disordering element comprising an element selected from the group consisting of silicon and krypton.
Claim 34
Dependent Claim
23 words
The method as defined by claim 31, wherein said introducing of a disordering element comprises implantation of ions into said multiple layer device.
Claim 35
Dependent Claim
14 words
The method as defined by claim 31, wherein said semiconductor regions are III-V semiconductors.
Claim 36
Dependent Claim
31 words
The method as defined by claim 31, further comprising annealing said device, after introduction of said disordering element, at a temperature in the range between about 500° C. and 700° C.
Claim 37
Dependent Claim
21 words
The method as defined by claim 31, wherein the thickness of said active semiconductor region is less than about 500 Angstroms.
Claim 38
Dependent Claim
21 words
The method as defined by claim 31, wherein the thickness of said active semiconductor region is less than about 200 Angstroms.
Claim 39
Dependent Claim
14 words
The method as defined by claim 31, wherein said active semiconducting region is GaAs.
Claim 40
Dependent Claim
28 words
The method as defined by claim 31, further including the additional step of bombarding said device, after said introduction of a disordering element, with a source of protons.
Claim 41
Dependent Claim
31 words
The method as defined by claim 32, further comprising annealing said device, after introduction of said disordering element, at a temperature in the range between about 500° C. and 700° C.
Claim 42
Dependent Claim
21 words
The method as defined by claim 32, wherein the thickness of said active semiconductor region is less than about 500 Angstroms.
Claim 43
Dependent Claim
21 words
The method as defined by claim 32, wherein the thickness of said active semiconductor region is less than about 200 Angstroms.
Claim 44
Dependent Claim
14 words
The method as defined by claim 32, wherein said active semiconducting region is GaAs.
Claim 45
Dependent Claim
28 words
The method as defined by claim 32, further including the additional step of bombarding said device, after said introduction of a disordering element, with a source of protons.
Claim 46
Dependent Claim
14 words
The method as defined by claim 32, wherein said semiconductor regions are III-V semiconductors.
Claim 47
Dependent Claim
21 words
The method as defined by claim 44, wherein the thickness of said active semiconductor region is less than about 500 Angstroms.
Claim 48
Dependent Claim
21 words
The method as defined by claim 44, wherein the thickness of said active semiconductor region is less than about 200 Angstroms.
Claim 49
Dependent Claim
31 words
The method as defined by claim 44, further comprising annealing said device, after introduction of said disordering element, at a temperature in the range between about 500° C. and 700° C.
Claim 50
Dependent Claim
14 words
The method as defined by claim 35, wherein said active semiconducting region is GaAs.
Claim 51
Dependent Claim
14 words
The method as defined by claim 37, wherein said semiconductor barrier region is AlAs.
Claim 52
Dependent Claim
18 words
The method as defined by claim 37, wherein said semiconductor barrier region is Al x Ga 1-x As.
Claim 53
Dependent Claim
14 words
The method as defined by claim 42, wherein said semiconductor barrier region is AlAs.
Claim 54
Dependent Claim
18 words
The method as defined by claim 42, wherein said semiconductor barrier region is Al x Ga 1-x As.
Claim 55
Dependent Claim
14 words
The method as defined by claim 48, wherein said semiconductor barrier region is AlAs.
Claim 56
Dependent Claim
18 words
The method as defined by claim 48, wherein said semiconductor barrier region is Al x Ga 1-x As.
Claim 57
Independent Claim
81 words
A method of making a semiconductor structure, comprising the steps of: forming a semiconductor structure which includes a first active semiconductor region disposed on a second semiconductor barrier layer, said region being sufficiently thin to exhibit quantum size effects; introducing a disordering element, selected from the group consisting of silicon and krypton, into said semiconductor structure to obtain a disordered alloy of both said first and second semiconductors, said alloy exhibiting a higher energy gap than said first active semiconductor region.
Claim 58
Independent Claim
81 words
A method of making a semiconductor structure, comprising the steps of: forming a semiconductor structure which includes a first active semiconductor region disposed on a second semiconductor barrier layer, said region being sufficiently thin to exhibit quantum size effects; introducing a disordering element, selected from the group consisting of silicon and krypton, into said semiconductor structure to obtain a disordered alloy of both said first and second semiconductors, said alloy exhibiting a higher energy gap than said first active semiconductor region.
Claim 59
Dependent Claim
22 words
The method as defined by claim 55, wherein said introducing of a disordering element comprises implantation of ions into said semiconductor structure.
Claim 60
Dependent Claim
16 words
The method as defined by claim 55, wherein said first and second semiconductors are III-V semiconductors.
Claim 61
Dependent Claim
15 words
The method as defined by claim 55, wherein said first active semiconducting region is GaAs.
Claim 62
Dependent Claim
16 words
The method as defined by claim 56, wherein said first and second semiconductors are III-V semiconductors.
Claim 63
Dependent Claim
15 words
The method as defined by claim 56, wherein said first active semiconducting region is GaAs.
Claim 64
Dependent Claim
15 words
The method as defined by claim 58, wherein said second semiconductor barrier layer is AlAs.
Claim 65
Dependent Claim
15 words
The method as defined by claim 60, wherein said second semiconductor barrier layer is AlAs.
Claim 66
Independent Claim
88 words
A method for integrating a semiconductor device into a monolithic structure, at least some of said device including heterojunction multilayer structures, comprising the steps of: constructing a heterojunction semiconductor device which includes first active semiconductor regions interposed between second semiconductor barrier layers; masking portions of said device; and introducing a disordering element, selected from the group consisting of silicon and krypton, into unmasked portions of said device to cause said active and barrier regions to compositionally disorder to a higher energy gap material than said active semiconductor regions.
Claim 67
Independent Claim
88 words
A method for integrating a semiconductor device into a monolithic structure, at least some of said device including heterojunction multilayer structures, comprising the steps of: constructing a heterojunction semiconductor device which includes first active semiconductor regions interposed between second semiconductor barrier layers; masking portions of said device; and introducing a disordering element, selected from the group consisting of silicon and krypton, into unmasked portions of said device to cause said active and barrier regions to compositionally disorder to a higher energy gap material than said active semiconductor regions.
Claim 68
Dependent Claim
21 words
The method as defined by claim 63, wherein said first active semiconductor regions are sufficiently thin to exhibit quantum size effects.
Claim 69
Dependent Claim
16 words
The method as defined by claim 63, wherein said disordering element is introduced using ion implantation.
Claim 70
Dependent Claim
16 words
The method as defined by claim 64, wherein said disordering element is introduced using ion implantation.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1988-04-15 | 1988-10-15 | 1989-04-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-04-15 | 1992-10-15 | 1993-04-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-04-15 | 1996-10-15 | 1997-04-16 | $7700.00 | Window Closed / Lapsed |