Low trigger voltage SCR protection device and structure

Claim 2

A SCR protection device comprising: a semiconductor substrate of a first conductivity type having a surface; a first region of second conductivity type in said substrate at said surface and having a boundary with said substrate; a second region of said second conductivity type within said first region and at said substrate surface; a third region of said first conductivity type within said first region at said substrate surface and adjacent said second region; a fourth region, which is of higher conductivity than the first region, in said first region at said substrate surface and extending across the boundary with the substrate into said substrate; a fifth region of said second conductivity type in said substrate at said surface and spaced apart from said first region; a sixth region of said first conductivity type in said substrate at said surface and spaced apart from said first region; a first terminal in electrical contact with both said second and third regions; and a second terminal in electrical contact with both said fifth and sixth regions; said substrate, first region and fifth region forming a first bipolar transistor of one conductivity type, and said substrate, first region and third region forming a second bipolar transistor of the opposite conductivity type which is connected to the first bipolar transistor to form a SCR.

Claim 3

The device of claim 1 wherein said sixth region abuts the fifth region.

Claim 4

The device of claim 2 wherein said third and fourth regions are spaced apart along said substrate surface to form source and drain regions of a field effect device and wherein a control gate means overlies and is insulated from the substrate surface between said third and fourth regions for controlling the degree of conduction between said third and fourth regions.

Claim 5

The device of claim 1 wherein said fourth region is of said first conductivity type.

Claim 6

The device of claim 4 wherein said third and fourth regions are spaced apart along said substrate surface to form source and drain regions of a field effect device and wherein a control gate means overlies and is insulated from the substrate surface between said third and fourth regions for controlling the degree of conduction between said third and fourth regions.

Claim 7

The device of claim 1 wherein said fourth region is of said second conductivity type.

Claim 8

The device of claim 6 wherein said third and fourth regions are spaced apart along said substrate surface to form source and drain regions of a field effect device and wherein a control gate means overlies and is insulated from the substrate surface between said third and fourth regions for controlling the degree of conduction between said third and fourth regions.

Claim 9

A structure comprising: an integrated circuit having a first terminal connected to a source of reference potential and a second terminal; a SCR protection device having first and second electrodes, each electrode being connected to one of said terminals; wherein said protection device comprises: a semiconductor substrate of a first conductivity type having a surface; a first region of second conductivity type in said substrate at said surface and having a boundary with said substrate; a second region of said second conductivity type within said first region at said substrate surface; a third region, of said first conductivity type within said first region at said substrate surface and adjacent said second region; a fourth region, which is of higher conductivity than said first region, in said first region and extending across the boundary with the substrate into said substrate; a fifth region of said second conductivity type in said substrate at said surface outside the boundary of said first region; a sixth region of said first conductivity type in said substrate at said surface outside the boundary of said first region; and said first terminal is in electrical contact with said second and third regions and said second terminal is in electrical contact with said fifth and sixth regions; said substrate, first region and fifth region forming a first bipolar transistor of one conductivity type, and said substrate, first region and third region forming a second bipolar transistor of the opposite conductivity type which is connected to the first bipolar transistor to form a SCR.

Claim 10

A structure comprising: an integrated circuit having a first terminal connected to a source of reference potential and a second terminal; a SCR protection device having first and second electrodes, each electrode being connected to one of said terminals; wherein said protection device comprises: a semiconductor substrate of a first conductivity type having a surface; a first region of second conductivity type in said substrate at said surface and having a boundary with said substrate; a second region of said second conductivity type within said first region at said substrate surface; a third region, of said first conductivity type within said first region at said substrate surface and adjacent said second region; a fourth region, which is of higher conductivity than said first region, in said first region and extending across the boundary with the substrate into said substrate; a fifth region of said second conductivity type in said substrate at said surface outside the boundary of said first region; a sixth region of said first conductivity type in said substrate at said surface outside the boundary of said first region; and said first terminal is in electrical contact with said second and third regions and said second terminal is in electrical contact with said fifth and sixth regions; said substrate, first region and fifth region forming a first bipolar transistor of one conductivity type, and said substrate, first region and third region forming a second bipolar transistor of the opposite conductivity type which is connected to the first bipolar transistor to form a SCR.

Claim 11

The device of claim 8 wherein said sixth region abuts the fifth region.

Claim 12

The structure of claim 9 wherein said third and fourth regions are spaced apart along said substrate surface to form source and drain regions of a field effect device and wherein a control gate means overlies and is insulated from the substrate surface between said third and fourth regions for controlling the degree of conduction between said third and fourth regions.

Claim 13

The structure of claim 10 wherein said fourth region is of said first conductivity type.

Claim 14

The structure of claim 10 wherein said fourth region is of said second conductivity type.

Claim 15

The structure of claim 8 wherein said second terminal is an input signal terminal of said integrated circuit.

Claim 16

The structure of claim 8 wherein said second terminal is an output signal terminal of said integrated circuit.

Claim 17

The structure of claim 8 wherein said second terminal is a voltage supply terminal of said integrated circuit.