Method for fabricating self-aligned semiconductor devices

Claim 1

A method for fabricating a high performance bipolar transistor, comprising: (a) forming a silicon semiconductor substrate comprising an active base region, a collector, and a sinker, the sinker being adjacent to and electrically isolated from the active base region, the sinker further being electrically coupled to the collector; (b) forming a silicon oxide mask layer overlying the silicon semiconductor substrate; (c) forming a silicon nitride mask layer overlying the silicon oxide mask layer which overlies the semiconductor substrate; (d) defining an emitter opening through the mask layer so that an emitter area is exposed on the surface of the active base region; (e) using silicon and chlorine source gases to form an epitaxial lateral overgrowth defining a self-aligned emitter contact which comprises sidewalls and which grows in the emitter opening at the active base region surface and continues its growth throughout the emitter opening as well as normal to and laterally over the mask layer; (f) determining the contact shape and size by defining the angle of the self-aligned contact sidewalls through alteration of the concentration ratio of the silicon source gas and the chlorine source gas; (g) forming a dielectric mask layer over the contact sidewalls in order to provide sufficient thickness at the outer periphery of the emitter contact to act as an effective plug mask over substantially the entire are of the emitter contact wherein the silicon nitride mask layer precludes growth of the contact side wall mask layer across the substrate surface; (h) removing the second silicon nitride mask layer from the surface of the silicon oxide mask layer; and (i) using the self-aligned emitter contact as a plug mask while implanting a self-aligned inactive base region into the substrate adjacent the area covered by the emitter contact.

Claim 2

A method for fabricating a high performance bipolar transistor, comprising: (a) forming a silicon semiconductor substrate comprising an active base region, a collector, and a sinker, the sinker being adjacent to and electrically isolated from the active base region, the sinker further being electrically coupled to the collector; (b) forming a silicon oxide mask layer overlying the silicon semiconductor substrate; (c) forming a silicon nitride mask layer overlying the silicon oxide mask layer which overlies the semiconductor substrate; (d) defining an emitter opening through the mask layer so that an emitter area is exposed on the surface of the active base region; (e) using silicon and chlorine source gases to form an epitaxial lateral overgrowth defining a self-aligned emitter contact which comprises sidewalls and which grows in the emitter opening at the active base region surface and continues its growth throughout the emitter opening as well as normal to and laterally over the mask layer; (f) determining the contact shape and size by defining the angle of the self-aligned contact sidewalls through alteration of the concentration ratio of the silicon source gas and the chlorine source gas; (g) forming a dielectric mask layer over the contact sidewalls in order to provide sufficient thickness at the outer periphery of the emitter contact to act as an effective plug mask over substantially the entire are of the emitter contact wherein the silicon nitride mask layer precludes growth of the contact side wall mask layer across the substrate surface; (h) removing the second silicon nitride mask layer from the surface of the silicon oxide mask layer; and (i) using the self-aligned emitter contact as a plug mask while implanting a self-aligned inactive base region into the substrate adjacent the area covered by the emitter contact.