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US4190949A
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Method for manufacturing a semiconductor device
Assignee: Toshiba Corp
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Filing: 1978-11-14
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Granted: 1980-03-04
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Expires: 1998-11-14
Abstract
Abstract Disclosed is a method for manufacturing a semiconductor device which comprises the steps of forming a first insulating film on a semiconductor substrate of one conductivity type which forms a collector region, boring an opening through the first insulating film to expose part of the substrate, forming a semiconductor layer on the exposed surface of the substrate and the first insulating film, forming a base-collector junction by introducing an impurity of the other conductivity type into the semiconductor layer, selectively removing the semiconductor layer to leave a semiconductor region consecutively connected to the exposed surface on the first insulating film, covering the semiconductor region with a second insulating film, and boring an opening through the second insulating film and introducing through the opening an impurity of the one conductivity type into the semiconductor region, whereby an emitter region is formed. In the aforementioned method, there is further provided a step for laminating the first insulating film with an insulating layer or a polycrystalline semiconductor layer containing an impurity of the otherconductivity type directly after the step for forming the first insulating film.
Inventors
- 👤 Masashi Ikeda
- 👤 Kazuo Kihara
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 18:10
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/051; H10D10/054; H10D10/40; H10D62/00; H10D62/10; H10D62/113; H10D62/115; H10P; H10P14/00; H10P14/20; H10P14/24; H10P14/27; H10P14/271; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10P14/32; H10P14/3202; H10P14/3204; H10P14/3211; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/1414; H10P32/17; H10P32/171; Y; Y10; Y10S; Y10S148/00; Y10S148/124; Y10S438/00; Y10S438/969
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
124 words
A method for manufacturing a semiconductor device comprising the steps of forming a first insulating film on a semiconductor substrate of one conductivity type; boring an opening through said first insulating film to expose part of said substrate; forming a semiconductor layer of the other conductivity type on the exposed surface of said substrate and said first insulating film; selectively removing said semiconductor layer to leave a semiconductor region consecutively connected to said exposed surface on said first insulating film; covering said semiconductor region with a second insulating film; boring an opening through said second insulating film and introducing through said opening an impurity of said one conductivity type into said semiconductor region; and forming electrodes on said semiconductor region and said semiconductor substrate.
Claim 2
Independent Claim
124 words
A method for manufacturing a semiconductor device comprising the steps of forming a first insulating film on a semiconductor substrate of one conductivity type; boring an opening through said first insulating film to expose part of said substrate; forming a semiconductor layer of the other conductivity type on the exposed surface of said substrate and said first insulating film; selectively removing said semiconductor layer to leave a semiconductor region consecutively connected to said exposed surface on said first insulating film; covering said semiconductor region with a second insulating film; boring an opening through said second insulating film and introducing through said opening an impurity of said one conductivity type into said semiconductor region; and forming electrodes on said semiconductor region and said semiconductor substrate.
Claim 3
Independent Claim
137 words
A method for manufacturing a semiconductor device comprising the steps of forming a first insulating film on a semiconductor substrate of one conductivity type which forms a collector region; boring an opening through said first insulating film to expose part of said substrate; forming a semiconductor layer on the exposed surface of said substrate and said first insulating film; forming a base-collector junction by introducing an impurity of the other conductivity type into said semiconductor layer; selectively removing said semiconductor layer to leave a semiconductor region consecutively connected to said exposed surface on said first insulating film; covering said semiconductor region with a second insulating film; and boring an opening through said second insulating film and introducing through said opening an impurity of said one conductivity type into said semiconductor region, whereby an emitter region is formed.
Claim 4
Independent Claim
137 words
A method for manufacturing a semiconductor device comprising the steps of forming a first insulating film on a semiconductor substrate of one conductivity type which forms a collector region; boring an opening through said first insulating film to expose part of said substrate; forming a semiconductor layer on the exposed surface of said substrate and said first insulating film; forming a base-collector junction by introducing an impurity of the other conductivity type into said semiconductor layer; selectively removing said semiconductor layer to leave a semiconductor region consecutively connected to said exposed surface on said first insulating film; covering said semiconductor region with a second insulating film; and boring an opening through said second insulating film and introducing through said opening an impurity of said one conductivity type into said semiconductor region, whereby an emitter region is formed.
Claim 5
Dependent Claim
40 words
A method according to claim 1 or 2 further comprising a step of laminating said first insulating film with an insulating layer containing an impurity of said other conductivity type directly after said step of forming said first insulating film.
Claim 6
Dependent Claim
44 words
A method according to claim 1 or 2 further comprising a step of laminating said first insulating film with a polycrystalline semiconductor layer containing an impurity of said other conductivity type at high concentration directly after said step of forming said first insulating film.
Claim 7
Dependent Claim
25 words
A method according to claim 1 or 2, wherein said semiconductor substrate comprises an epitaxial layer, and said semiconductor layer comprises a vapor growth layer.
References Cited (Backward Citations)
US3796613A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-03-04 | 1983-09-03 | 1984-03-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-03-04 | 1987-09-03 | 1988-03-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-03-04 | 1991-09-03 | 1992-03-04 | $7700.00 | Window Closed / Lapsed |