Method of forming dielectric isolation for high density pedestal semiconductor devices

Abstract

Abstract A DIELECTRICALLY ISOLATED SSEMICONDUCTOR DEVICE CAN BE MANUFACTURED, THE STRUCTURE IS USEABLE FOR INTERGRATED CIRCUITS, INCLUDING FIELD EFFECT AND/OR BIPOLAR TRANSISTORS, WHEREIN A SIGNIFICANT SAVINGS IN SURFACE AREA AND REDUCTION IN CAPACITANCES CAN BE OBTAINED OVER PRIOR TECHNIQUES. THE METHOD INVOLVES FORMING A LYYER OF DIELECTRIC MATERIAL UPON A SEMI-CONDUCTOR BODY, HAVING A DIFFUSED REGION WHERE A BIPOLAR DEVICE IS TO BE FORMED, AND THE FORMING AN OPENING IN THE LAYER TO EXPOSE A PART OF THE SURFACE OF THE DIFFUSED REGION OF THE SEMICONDUCTOR BODY. AN EQITAXIAL LAYER OF SILICON IS DEPOSITED ON TOP. SINGLE CRYSTAL SILICON WILL GROW OVER THE EXPOSED SILICON AREA AND IF A DIFFUSED REGION IS PRESENT IN THE SUBSTRATE A PEDESTAL WILL OUTDIFFUSE THROUGH THE SAME AREA FROM THE BURIED DIFFUSED REGION. POLYCRYSTALLINE SILICON WILL GROW ON TOP OF THE DIELECTRIC MATERIAL. THE PEDESTAL IS FORMED IN A SINGLE CRYSTAL EPITAXIAL LAYER OF ANOTHER IMPURITY TYPE. TWO OTHER ACTIVE ELEMENTS OF A BIPOLAR TRANSISTOR, SUCH AS THE EMITTER AND INTRINSIC BASE REGIONS, ARE THEN FORMED IN THE SAME SINGLE CRYSTAL EPITAXIAL LAYER WHILE THE INACTIVE AREA, SUCH AS THE EXTRINSIC BASE, IS FORMED IN POLYCRYSTALLINE SILICON, A REACH THROUGH IS MADE THROUGH THE DIELECTRIC LAYER TO THE THIRD ELEMENT OF THE TRANSISTOR, THAT IS COLLECTOR REGION. D R A W I N G

Inventors

• 👤 I Magdo
• 👤 S Magdo

Bibliographic Details