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US5032884A
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Semiconductor pin device with interlayer or dopant gradient
Assignee: Kanegafuchi Chemical Industry Co Ltd
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Filing: 1990-02-07
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Granted: 1991-07-16
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Expires: 2010-02-07
Abstract
Abstract A semiconductor device comprising a pin-type or nip-type amorphous-containing semiconductor layers; characterized in that (1) at least one interlayer made of semiconductor or insulator having higher electrical resistivity than a semiconductor which adjoins the interlayer is/are interposed between semiconductor layers or between a semiconductor and an electrode, (2) an amount of dopant in a p-type or n-type layer is least at a junction interface of p/i or n/i and increases gradually toward a junction interface of p/electrode or n/electrode, or (3) a p-type semiconductor layer being the same conductive type as the p-type semiconductor and having higher impurity density and/or an n-type semiconductor layer being the same conductive type as the n-type semiconductor layer and having higher impurity density is/are interposed between the p-type semiconductor layer and the electrode at the side of the p-type semiconductor layer and/or between the n-type semiconductor layer and the electrode at the side of the n-type semiconductor layer. According to the semiconductor device of the present invention (in the case of (1) or (2)), large Voc and electric current at a specific voltage can be obtained, further in the case of (3), photoelectric conversion efficiency can be improved.
Inventors
- 👤 Hideo Yamagishi
- 👤 Masataka Kondo
- 👤 Kunio Nishimura
- 👤 Akihiko Hiroe
- 👤 Keizou Asaoka
- 👤 Kazunori Tsuge
- 👤 Yoshihisa Tawada
- 👤 Minori Yamaguchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 23:54
CPC Classifications
H; H10; H10F; H10F10/00; H10F10/10; H10F10/17; H10F71/00; H10F71/10; H10F71/103; H10F71/1035; H10F77/00; H10F77/10; H10F77/16; H10F77/162; H10F77/166; H10F77/1662; Y; Y02; Y02E; Y02E10/00; Y02E10/50; Y02E10/548; Y02P; Y02P70/00; Y02P70/50
Claims Analysis
Total Claims: 24
Claim 1
Independent Claim
190 words
A semiconductor device comprising at least one set of semiconductor layers, said set having a p-i-n structure wherein (1) p represents a p-type semiconductor layer which is an at least partially amorphous material doped with a p-type dopant, (2) i represents an intrinsic semiconductor layer which is an at least partially amorphous semiconductor material, and (3) n represents an n-type semiconductor layer which is an at least partially amorphous semiconductor material doped with an n-type dopant, said semiconductor device further comprising at least one electrode provided on the outer surface of the outermost p-type semiconductor layer and at least one electrode provided on the outer surface of the outermost n-type semiconductor layer, wherein at least one interlayer is interposed at at least one interface between two semiconductor layers of said p-i-n structure, said interlayer being selected from the group consisting of Si 1-x C x :X:Y, Si 1-x N x :X:Y and Si 1-x O x :X:Y, wherein x satisfies the relationship 0<x<1, X is selected from the group consisting of H, Cl, F and Br; and Y is selected from the group consisting of H, Cl, F and Br.
Claim 2
Dependent Claim
190 words
A semiconductor device comprising at least one set of semiconductor layers, said set having a p-i-n structure wherein (1) p represents a p-type semiconductor layer which is an at least partially amorphous material doped with a p-type dopant, (2) i represents an intrinsic semiconductor layer which is an at least partially amorphous semiconductor material, and (3) n represents an n-type semiconductor layer which is an at least partially amorphous semiconductor material doped with an n-type dopant, said semiconductor device further comprising at least one electrode provided on the outer surface of the outermost p-type semiconductor layer and at least one electrode provided on the outer surface of the outermost n-type semiconductor layer, wherein at least one interlayer is interposed at at least one interface between two semiconductor layers of said p-i-n structure, said interlayer being selected from the group consisting of Si 1-x C x :X:Y, Si 1-x N x :X:Y and Si 1-x O x :X:Y, wherein x satisfies the relationship 0<x<1, X is selected from the group consisting of H, Cl, F and Br; and Y is selected from the group consisting of H, Cl, F and Br.
Claim 3
Dependent Claim
20 words
The device of claim 1, wherein the interlayer is Si 1-x C x :H, wherein x satisfies the relationship 0<x<1.
Claim 4
Dependent Claim
16 words
The device of claim 1, wherein the thickness of the interlayer is 10 to 500 Å.
Claim 5
Dependent Claim
16 words
The device of claim 2, wherein the thickness of the interlayer is 10 to 500 Å.
Claim 6
Dependent Claim
198 words
A semiconductor device comprising at least one set of semiconductor layers, said set having a p-i-n structure wherein (1) p represents a p-type semiconductor layer which is an at least partially amorphous material doped with a p-type dopant, (2) i represents an intrinsic semiconductor layer which is an at least partially amorphous semiconductor material, and (3) n represents an n-type semiconductor layer which is an at least partially amorphous semiconductor material doped with an n-type dopant, said semiconductor device further comprising at least one electrode provided on the outer surface of the outermost p-type semiconductor layer and at least one electrode provided on the outer surface of the outermost n-type semiconductor layer, wherein at least one doped semiconductor layer selected from the group consisting of said p-type semiconductor layer and said n-type semiconductor layer has a dopant gradient in the region extending from the interface with the intrinsic layer to a depth which is less than the entire thickness of said doped semiconductor layer, said dopant gradient being such that the dopant concentration in said region continuously increases away from the interface with the intrinsic layer from zero to the maximum dopant concentration in said doped semiconductor layer.
Claim 7
Dependent Claim
198 words
A semiconductor device comprising at least one set of semiconductor layers, said set having a p-i-n structure wherein (1) p represents a p-type semiconductor layer which is an at least partially amorphous material doped with a p-type dopant, (2) i represents an intrinsic semiconductor layer which is an at least partially amorphous semiconductor material, and (3) n represents an n-type semiconductor layer which is an at least partially amorphous semiconductor material doped with an n-type dopant, said semiconductor device further comprising at least one electrode provided on the outer surface of the outermost p-type semiconductor layer and at least one electrode provided on the outer surface of the outermost n-type semiconductor layer, wherein at least one doped semiconductor layer selected from the group consisting of said p-type semiconductor layer and said n-type semiconductor layer has a dopant gradient in the region extending from the interface with the intrinsic layer to a depth which is less than the entire thickness of said doped semiconductor layer, said dopant gradient being such that the dopant concentration in said region continuously increases away from the interface with the intrinsic layer from zero to the maximum dopant concentration in said doped semiconductor layer.
Claim 8
Dependent Claim
21 words
The device of claim 5, wherein at least one of the p-type and n-type semiconductor layers is a layer of a-SiC:H.
Claim 9
Dependent Claim
21 words
The device of claim 5, wherein at least one of the p-type and n-type semiconductor layers is a layer of a-Si:H.
Claim 10
Dependent Claim
20 words
The device of claim 5, wherein the depth of said region having a dopant gradient is at least 20 Å.
Claim 11
Dependent Claim
20 words
The device of claim 5, wherein the depth of said region having a dopant gradient is at least 100 Å.
Claim 12
Dependent Claim
28 words
The device of claim 5, wherein the dopant in the p-type semiconductor layer is an element selected from the group consisting of B, Al, Ga, In and Tl.
Claim 13
Dependent Claim
28 words
The device of claim 6, wherein the dopant in the p-type semiconductor layer is an element selected from the group consisting of B, Al, Ga, In and Tl.
Claim 14
Dependent Claim
28 words
The device of claim 7, wherein the dopant in the p-type semiconductor layer is an element selected from the group consisting of B, Al, Ga, In and Tl.
Claim 15
Dependent Claim
29 words
The device of claim 5, wherein the dopant in the n-type semiconductor layer is an element selected from the group consisting of N, P, As, Sb, Te and Po.
Claim 16
Dependent Claim
29 words
The device of claim 6, wherein the dopant in the n-type semiconductor layer is an element selected from the group consisting of N, P, As, Sb, Te and Po.
Claim 17
Dependent Claim
29 words
The device of claim 7, wherein the dopant in the n-type semiconductor layer is an element selected from the group consisting of N, P, As, Sb, Te and Po.
Claim 18
Dependent Claim
189 words
A semiconductor device comprising at least one set of semiconductor layers, said set having a p-i-n structure consisting of: (1) a p-type semiconductor layer which is an at least partially amorphous material doped with a p-type dopant, (2) an intrinsic semiconductor layer which is an at least partially amorphous semiconductor material, and (3) an n-type semiconductor layer which is an at least partially amorphous semiconductor material doped with an n-type dopant, wherein p represents said p-type semiconductor layer, i represents said intrinsic semiconductor layer, and n represents said n-type semiconductor layer, said semiconductor device further comprising at least one electrode provided on the outer surface of the outermost p-type semiconductor layer and at least one electrode provided on the outer surface of the outermost n-type semiconductor layer, wherein a highly doped semiconductor layer is interposed at at least one interface between an electrode and an adjacent doped semiconductor layer of said p-i-n structure, said highly doped semiconductor layer having the same type of conductivity as said adjacent doped semiconductor layer and having a dopant concentration which is at least twice the dopant concentration of said adjacent doped semiconductor layer.
Claim 19
Dependent Claim
189 words
A semiconductor device comprising at least one set of semiconductor layers, said set having a p-i-n structure consisting of: (1) a p-type semiconductor layer which is an at least partially amorphous material doped with a p-type dopant, (2) an intrinsic semiconductor layer which is an at least partially amorphous semiconductor material, and (3) an n-type semiconductor layer which is an at least partially amorphous semiconductor material doped with an n-type dopant, wherein p represents said p-type semiconductor layer, i represents said intrinsic semiconductor layer, and n represents said n-type semiconductor layer, said semiconductor device further comprising at least one electrode provided on the outer surface of the outermost p-type semiconductor layer and at least one electrode provided on the outer surface of the outermost n-type semiconductor layer, wherein a highly doped semiconductor layer is interposed at at least one interface between an electrode and an adjacent doped semiconductor layer of said p-i-n structure, said highly doped semiconductor layer having the same type of conductivity as said adjacent doped semiconductor layer and having a dopant concentration which is at least twice the dopant concentration of said adjacent doped semiconductor layer.
Claim 20
Dependent Claim
21 words
The device of claim 16, wherein the conductivity of at least one said highly doped semiconductor layer is of the p-type.
Claim 21
Dependent Claim
21 words
The device of claim 16, wherein the conductivity of at least one said highly doped semiconductor layer is of the n-type.
Claim 22
Dependent Claim
37 words
The device of claim 16, wherein the conductivity of at least one said highly doped semiconductor layer is of the p-type, and the conductivity of at least another said highly doped semiconductor layer is of the n-type.
Claim 23
Dependent Claim
19 words
The device of claim 16, wherein the thickness of said highly doped semiconductor layer is 10 to 300 Å.
Claim 24
Dependent Claim
29 words
The device of claim 16, wherein the dopant concentration of said highly doped semiconductor layer is at least four times the dopant concentration of said adjacent doped semiconductor layer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1994-07-15 | 1995-01-14 | 1995-07-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-07-15 | 1999-01-14 | 1999-07-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-07-15 | 2003-01-14 | 2003-07-16 | $7700.00 | Window Closed / Lapsed |