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US4935379A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device and method of manufacturing the same

Assignee: Toshiba Corp
•
Filing: 1989-03-01
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Granted: 1990-06-19
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Expires: 2009-03-01
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Abstract

Abstract The invention provides a semiconductor device and manufacturing method therefor which comprises: a semiconductor substrate of a first conductivity type, source and drain regions of a second conductivity type provided on the surface of the substrate in a mutually electrically isolated arrangement, and a gate electrode provided on the surface of the substrate on the other side of an insulating film and the substrate surface including a channel region between these aforementioned regions; at least the drain region, of which the source and drain regions, consisting of: a first impurity diffusion region provided on the substrate surface in the vicinity of the end portion of the gate electrode; a second impurity diffusion region more highly doped than the first impurity diffusion region and provided in at least a portion of the surface of the aforementioned diffusion region adjacent the end portion of this first impurity diffusion region; and a third impurity diffusion region more highly doped than the second impurity diffusion region and provided on the substrate surface adjacent to the end portion of this second impurity diffusion region.

Inventors

  • 👤 Yoshiaki Toyoshima

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 08:05
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D30/60; H10D30/601; H10D30/605; Y; Y10; Y10S; Y10S257/00; Y10S257/90

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 173 words
A method of manufacturing a semiconductor device, comprising the steps of: selectively forming a field insulating film on a semiconductor substrate of a first conductive type; forming a gate insulating film on said semiconductor substrate surface, followed by formation of a gate electrode; forming a first impurity diffusion region of a second conductive type in said semiconductor substrate surface, using said gate electrode as a mask using a relatively low dose of a first impurity of second conductive type; forming a second impurity diffusion region of a second conductive type, inside of the edge of said first impurity diffusion region using said gate electrode as a mask, and conductive type having a smaller diffusion coefficient than that of said first impurity; forming an insulating film on the lateral surface of said gate electrode after the formation of said first and second impurity diffusion regions; and forming a third impurity diffusion region of a second conductive type having a higher concentration than said second impurity diffusion region using said insulating film as a mask.
Claim 2
Independent Claim 173 words
A method of manufacturing a semiconductor device, comprising the steps of: selectively forming a field insulating film on a semiconductor substrate of a first conductive type; forming a gate insulating film on said semiconductor substrate surface, followed by formation of a gate electrode; forming a first impurity diffusion region of a second conductive type in said semiconductor substrate surface, using said gate electrode as a mask using a relatively low dose of a first impurity of second conductive type; forming a second impurity diffusion region of a second conductive type, inside of the edge of said first impurity diffusion region using said gate electrode as a mask, and conductive type having a smaller diffusion coefficient than that of said first impurity; forming an insulating film on the lateral surface of said gate electrode after the formation of said first and second impurity diffusion regions; and forming a third impurity diffusion region of a second conductive type having a higher concentration than said second impurity diffusion region using said insulating film as a mask.
Claim 3
Dependent Claim 22 words
A method of manufacturing a semiconductor device according to claim 1, wherein said gate electrode is made from a polycrystalline silicon film.
Claim 4
Dependent Claim 26 words
A method of manufacturing a semiconductor device according to claim 1, wherein said first impurity diffusion region is formed by activation by implantation of phosphorus ions.
Claim 5
Dependent Claim 28 words
A method of manufacturing a semiconductor device according to claim 3, wherein said second and third impurity diffusion regions are formed by activation by implantation of arsenic ions.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-06-18 1993-12-18 1994-06-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-06-18 1997-12-18 1998-06-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-06-18 2001-12-18 2002-06-19 $7700.00 Window Closed / Lapsed

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