Insulated-gate field-effect transistor

Claim 1

In an integrated circuit including a semiconductor substrate of one conductivity type having a wiring region of the opposite conductivity type, an insulated-gate field-effect transistor comprising: source and drain regions of the opposite conductivity type formed in said semiconductor substrate, said source and drain regions respectively being formed with a relatively shallow diffused region and a relatively deep diffused region, said shallow diffused regions in said source and drain regions being formed by the diffusion of first impurity having a relatively low diffusion coefficient compared to that of a second impurity diffused into said deep diffused regions in said course and drain regions, said shallow diffused regions in said source and drain regions being adjacent to a channel region; a gate-insulation film formed on the surface of said semiconductor substrate between said source region and said drain region; a gate electrode formed on said gate-insulation film; an insulation film formed on said gate electrode and on said shallow diffused regions in said source and drain regions; a source electrode formed on said deep diffused region in said source region; a drain electrode formed on said deep diffused region in said drain region and connected to said wiring region; and, wherein said wiring region is a diffused region relatively deeper than said shallow diffused regions in said source and drain regions.