Mosfet transistor and method of fabrication

Claim 2

In the process of fabricating an n channel field effect semiconductor device having a source and drain element for use in dynamic memories, comprising the steps of: selectively disposing an insulating layer on said semiconductor device so that a fraction of said source and drain elements is exposed; and disposing phosphorous into said the source and drain elements having been previously formed and having been doped by an impurity from the group of antimony and arsenic so that a deep diffusion of phosphorous is formed in said source and drain elements without substantial lateral diffusion of said source and drain elements.

Claim 3

The process of claim 1 wherein said deposition is sufficiently heavy to form regions of n++ conductivity in said source and drain elements and at a temperature to round the exposed edges of the oxide layer surrounding said source and drain so that minority carrier lifetimes are substantially increased.

Claim 4

In the process of fabricating a field effect semiconductor device for use in a dynamic device, the step of: diffusing phosphorous into the source and drain elements of said device, said source and drain elements having been previously formed whereby the minority carrier lifetime in said device is substantially increased.

Claim 5

In the process of fabricating a field effect semiconductor device for use in a dynamic device, the step of: diffusing phosphorous into the source and drain elements of said device, said source and drain elements having been previously formed whereby the minority carrier lifetime in said device is substantially increased.

Claim 6

The process of claim 3 wherein said semiconductor device is formed in monocrystalline silicon having a 100 plane crystal orientation.

Claim 7

In the process of fabricating an n channel field effect semiconductor device having a source and drain element for use in dynamic memories comprising the steps of: selectively disposing an oxide layer on said semiconductor device to expose a subsurface of the surface of said source and drain elements said subsurface being circumscribed by said surface; and disposing phosphorous into said source and drain elements, said source and drain elements having been previously formed with dopants from the group consisting of antimony and arsenic, said phosphorous being disposed to form region of n++ conductivity in said source and drain elements at a temperature sufficiently high to round the exposed edges of said oxide layer and to enable a deep diffusion of phosphorous to be formed into said source and drain elements without substantial lateral diffusion of said source and drain elements so that minority carrier lifetimes are substantially increased.

Claim 8

In the process of fabricating an n channel field effect semiconductor device having a source and drain element for use in dynamic memories comprising the steps of: selectively disposing an oxide layer on said semiconductor device to expose a subsurface of the surface of said source and drain elements said subsurface being circumscribed by said surface; and disposing phosphorous into said source and drain elements, said source and drain elements having been previously formed with dopants from the group consisting of antimony and arsenic, said phosphorous being disposed to form region of n++ conductivity in said source and drain elements at a temperature sufficiently high to round the exposed edges of said oxide layer and to enable a deep diffusion of phosphorous to be formed into said source and drain elements without substantial lateral diffusion of said source and drain elements so that minority carrier lifetimes are substantially increased.