US3699646A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Integrated circuit structure and method for making integrated circuit structure
Assignee: Intel Corp
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Filing: 1970-12-28
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Granted: 1972-10-24
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Expires: 1990-12-28
Abstract
Abstract In connection with the fabrication of an integrated circuit, a method for simultaneously completing the formation of a contact, an interconnect, a gate and a source or drain is disclosed. An integrated circuit field effect structure wherein a diffused silicon area is connected directly to a polysilicon member by conductive silicon and more specifically the source or drain of one device is directly and continuously connected to the gate of an adjacent device by a conductive silicon member.
Inventors
- 👤 Leslie L Vadasz
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 06:03
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D99/00; H10P; H10P95/00; H10W20/41; H10W20/44; H10W20/4451; Y; Y10; Y10S; Y10S148/00; Y10S148/043; Y10S148/053; Y10S148/106; Y10S148/122
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
141 words
In a method for forming an integrated circuit having a gate type device with a source and drain therein including a semiconductor wafer having a planar surface the steps comprising: forming a masking layer on said planar surface; forming an opening in said masking layer; depositing a contact and interconnect material on said masking layer and in said opening which material is substantially more permeable to dopants employed to form an impurity region in said wafer then said masking layer; forming said contact and interconnect material into a pattern wherein said material extends from the source or drain of one gate type device to another device; and diffusing impurities into said semiconductor wafer via said contact material in said opening to form an impurity region beneath said contact and proximity thereto comprising said source or drain of a gate type device.
Claim 2
Dependent Claim
141 words
In a method for forming an integrated circuit having a gate type device with a source and drain therein including a semiconductor wafer having a planar surface the steps comprising: forming a masking layer on said planar surface; forming an opening in said masking layer; depositing a contact and interconnect material on said masking layer and in said opening which material is substantially more permeable to dopants employed to form an impurity region in said wafer then said masking layer; forming said contact and interconnect material into a pattern wherein said material extends from the source or drain of one gate type device to another device; and diffusing impurities into said semiconductor wafer via said contact material in said opening to form an impurity region beneath said contact and proximity thereto comprising said source or drain of a gate type device.
Claim 3
Dependent Claim
11 words
The method of claim 1 wherein said semiconductor wafer is silicon.
Claim 4
Dependent Claim
11 words
The method of claim 2 wherein said interconnect material is silicon.
Claim 5
Dependent Claim
12 words
The method of claim 3 wherein said masking material is silicon dioxide.
Claim 6
Dependent Claim
52 words
The method of claim 1 wherein said integrated circuit includes at least a plurality silicon gate field effect devices comprising a source, drain and gate and wherein said patterning of The interconnect material simultaneously forms a contact to one device interconnected to the gate of another device which gate is simultaneously formed.
Claim 7
Dependent Claim
17 words
The method of claim 1 wherein said impurities are simultaneously diffused into said interconnect and contact material.
Claim 8
Dependent Claim
20 words
The method of claim 5 wherein said impurities are simultaneously diffused into said interconnect, said contact material and said gate.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-10-24 | 1976-04-24 | 1976-10-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-10-24 | 1980-04-24 | 1980-10-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-10-24 | 1984-04-24 | 1984-10-24 | $7700.00 | Window Closed / Lapsed |