Patent US4892839A successfully refreshed from Google Patents.
US4892839A
Expired / Lapsed
US
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Method of manufacturing a semiconductor device with polysilicon resistors and field plate
Assignee: Fuji Electric Co Ltd
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Filing: 1987-10-19
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Granted: 1990-01-09
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Expires: 2007-10-19
Abstract
Abstract A method of manufacturing a semiconductor device in which a base of a second conductivity type is provided in a semiconductor substrate of a first conductivity type, which operates as a collector. An emitter of the first conductivity type is provided in the base, a pn junction between the collector and the base is exposed on the surface of the semiconductor substrate, and the emitter is provided with stabilizing resistors. The method comprises the steps of providing a silicon oxide film over the entire surface of the semiconductor device, and a polysilicon film over both the emitter and a first portion of the pn junction exposed on the surface of the semiconductor substrate, and impurities are diffused into only a second portion of the polysilicon film located over the emitter to reduce the resistance of the second portion of the polysilicon film.
Inventors
- 👤 Shinichi Ito
- 👤 Hirokazu Kaneda
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 21:18
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/111; H10D64/115; H10D84/00; H10D84/101; H10D84/121; H10D84/125; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/1414; H10P32/17; H10P32/171
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
237 words
A method of manufacturing a semiconductor device with polysilicon resistors in which a base of a second conductivity type is provided in a semiconductor substrate of a first conductivity type, said semiconductor substrate of said first conductivity type being a collector, an emitter of said first conductivity type being provided in said base, pn junctions between said collector and said base being exposed on a surface of said semiconductor substrate, and said emitter being provided with low resistance stabilizing resistors, comprising the steps of: providing a silicon oxide film on said surface of said substrate; providing a polysilicon film on portions of said silicon oxide film above at least said emitter and said pn junctions between said collector and said base; providing a resist film on said polysilicon film; removing a portion of said resist film located above said emitter so that said resist film remains in place above said pn junctions between said collector and said base; implanting ions having said first conductivity type into the portions of said polysilicon film above said emitter where said resist film has been removed; heating said polysilicon film to diffuse said ions only into said portion of said polysilicon film above said emitter; and photoetching said polysilicon film and said silicon oxide film so as to form said low resistance stabilizing resistors above said emitter and high resistance films above said pn junctions between said collector and said base.
Claim 2
Independent Claim
237 words
A method of manufacturing a semiconductor device with polysilicon resistors in which a base of a second conductivity type is provided in a semiconductor substrate of a first conductivity type, said semiconductor substrate of said first conductivity type being a collector, an emitter of said first conductivity type being provided in said base, pn junctions between said collector and said base being exposed on a surface of said semiconductor substrate, and said emitter being provided with low resistance stabilizing resistors, comprising the steps of: providing a silicon oxide film on said surface of said substrate; providing a polysilicon film on portions of said silicon oxide film above at least said emitter and said pn junctions between said collector and said base; providing a resist film on said polysilicon film; removing a portion of said resist film located above said emitter so that said resist film remains in place above said pn junctions between said collector and said base; implanting ions having said first conductivity type into the portions of said polysilicon film above said emitter where said resist film has been removed; heating said polysilicon film to diffuse said ions only into said portion of said polysilicon film above said emitter; and photoetching said polysilicon film and said silicon oxide film so as to form said low resistance stabilizing resistors above said emitter and high resistance films above said pn junctions between said collector and said base.
Claim 3
Dependent Claim
42 words
A method of manufacturing a semiconductor device with polysilicon resistors as claimed in claim 1, wherein said resist film is removed in such a pattern that said ions are implanted into only portions of said polysilicon film which become said stabilizing resistors.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-01-08 | 1993-07-10 | 1994-01-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-01-08 | 1997-07-10 | 1998-01-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-01-08 | 2001-07-10 | 2002-01-09 | $7700.00 | Window Closed / Lapsed |