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EP0173611A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Self-aligned metal silicide process for integrated circuits having self-aligned polycrystalline silicon electrodes

Assignee: Fairchild Semiconductor Corp
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Filing: 1985-07-26
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Granted: —
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Expires: 2005-07-26
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Abstract

Abstract © A process for fabricating self-aligned regions of metal silicide on bipolar integrated circuits having self-aligned polycrystalline silicon emitters and base contacts includes the steps of depositing a layer of polycrystalline silicon across the surface of the structure, patterning the polycrystalline silicon to define the emitters and base contacts as well as resistors and diodes, heating the structure to transfer desired conductivity dopants from the polycrystalline silicon into the underlying structure, forming a protective layer over those regions of the structure where metal silicide is not desired, depositing a layer of refractory metal across the entire structure, and reacting the refractory metal with the underlying silicon to form metal silicide.

Inventors

  • 👤 Yun Bai Koh
  • 👤 Frank Chien
  • 👤 Madhu Vora

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-01 02:24
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/40; H10D1/47; H10D62/00; H10D62/40; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0113; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/1414; H10P32/17; H10P32/171

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 134 words
A process for fabricating metal silicide interconnections to polycrystalline silicon regions on a semiconductor structure comprising: forming first regions (21, 22, 24, 25, 26) of polycrystalline silicon containing impurity on a semiconductor structure: treating the structure to cause some of the impurity to diffuse into the semiconductor structure (42, 44) from the polycrystalline silicon: protecting those portions of the structure where metal silicide is not desired by forming a protective coating (45, 46, 47, 48) over those portions; depositing a layer of a metal (50) capable of reacting with silicon across the structure including over the protective coating and over the polycrystalline silicon; and , reacting the metal with the polycrystalline silicon but not with the protective coating to thereby form metal silicide interconnections (52, 53, 54, 55, 57, 58) to the polycrystalline silicon.
Claim 2
Dependent Claim 134 words
A process for fabricating metal silicide interconnections to polycrystalline silicon regions on a semiconductor structure comprising: forming first regions (21, 22, 24, 25, 26) of polycrystalline silicon containing impurity on a semiconductor structure: treating the structure to cause some of the impurity to diffuse into the semiconductor structure (42, 44) from the polycrystalline silicon: protecting those portions of the structure where metal silicide is not desired by forming a protective coating (45, 46, 47, 48) over those portions; depositing a layer of a metal (50) capable of reacting with silicon across the structure including over the protective coating and over the polycrystalline silicon; and , reacting the metal with the polycrystalline silicon but not with the protective coating to thereby form metal silicide interconnections (52, 53, 54, 55, 57, 58) to the polycrystalline silicon.
Claim 3
Dependent Claim 48 words
A process as in claim 1, wherein the step of forming comprises: forming a sheet (20) of the polycrystalline silicon containing impurity; fabricating regions of oxidation resistant material (30) over the first regions; and removing all of the sheet (20) except the first regions by etching the sheet.
Claim 4
Dependent Claim 31 words
A process as in claim 2, wherein the step of protecting comprises: oxidizing the structure except where overlaid by the oxidation resistant material (30); and removing the oxidation resistant material (30).
Claim 5
Dependent Claim 17 words
A process as in claim 3, wherein the protective coating (45, 46, 47, 48) comprises silicon dioxide.
Claim 6
Dependent Claim 15 words
A process as in claim 4, wherein the oxidation resistant material (30) comprises silicon nitride.
Claim 7
Dependent Claim 28 words
A process as in claim 3, wherein the step of depositing a layer of metal (50) comprises depositing one of titanium, not suitable for self-alignment, molybdenum and tungsten.
Claim 8
Dependent Claim 19 words
A process as in claim 6, wherein the step of reacting comprises heating the metal to form metal silicide.
Claim 9
Dependent Claim 203 words
A process for fabricating metal silicide interconnections to polycrystalline silicon regions on a bipolar semiconductor structure comprising: depositing a layer of polycrystalline silicon (20) across the semiconductor structure; introducing desired conductivity type impurity into the polycrystalline silicon layer (20); coating the polycrystalline silicon layer with a layer of silicon nitride (30); removing first regions (31, 34) of silicon nitride wherever metal silicide interconnections are not desired; patterning the layer of polycrystalline silicon (20): heating the structure to cause some of the impurity in the polycrystalline silicon layer to diffuse (42. 44) into the semiconductor structure; oxidizing the semiconductor structure to form a protective coating (45, 46, 47, 48) of silicon dioxide wherever the semiconductor structure is not overlaid by polycrystalline silicon (20) and wherever silicon nitride (30) does not overlay the polycrystalline silicon (20): removing all of the remaining portions of the layer of silicon nitride (30); depositing a layer (50) of a metal capable of reacting with the polycrystalline silicon across the structure, including over the silicon dioxide and over the polycrystalline silicon; reacting the metal with the polycrystalline silicon (20) but not with the silicon dioxide to thereby form metal silicide interconnections to the polycrystalline silicon: and removing the unreacted metal.
Claim 10
Dependent Claim 203 words
A process for fabricating metal silicide interconnections to polycrystalline silicon regions on a bipolar semiconductor structure comprising: depositing a layer of polycrystalline silicon (20) across the semiconductor structure; introducing desired conductivity type impurity into the polycrystalline silicon layer (20); coating the polycrystalline silicon layer with a layer of silicon nitride (30); removing first regions (31, 34) of silicon nitride wherever metal silicide interconnections are not desired; patterning the layer of polycrystalline silicon (20): heating the structure to cause some of the impurity in the polycrystalline silicon layer to diffuse (42. 44) into the semiconductor structure; oxidizing the semiconductor structure to form a protective coating (45, 46, 47, 48) of silicon dioxide wherever the semiconductor structure is not overlaid by polycrystalline silicon (20) and wherever silicon nitride (30) does not overlay the polycrystalline silicon (20): removing all of the remaining portions of the layer of silicon nitride (30); depositing a layer (50) of a metal capable of reacting with the polycrystalline silicon across the structure, including over the silicon dioxide and over the polycrystalline silicon; reacting the metal with the polycrystalline silicon (20) but not with the silicon dioxide to thereby form metal silicide interconnections to the polycrystalline silicon: and removing the unreacted metal.

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