US4880754A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for providing engineering changes to LSI PLAs
Assignee: International Business Machines Corp
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Filing: 1987-07-06
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Granted: 1989-11-14
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Expires: 2007-07-06
Abstract
Abstract A method for providing engineering changes to LSI PLAs. One or more additional input lines, output lines, and/or product terms are provided in the overall mask set, however, logically unconnected to the rest of the PLA, which is designed to provide the desired PLA function. The additional lines and terms are provided so as to be able to be connected to the PLA, and provide additional personalization by changes to the contact mask and masks for subsequent process steps to contact. The invention may be incorporated in an existing PLA macro assembler system. By simply redefining certain cells the additional devices may be incorporated through those redefined individual cells. Thus, the invention is relatively easy to retrofit to existing PLA macro assembler systems.
Inventors
- 👤 Anthony Correale
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 04:06
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/01; H10W20/031; H10W20/064; H10W20/067; Y; Y10; Y10S; Y10S148/00; Y10S148/104; Y10S148/143
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
227 words
A method for fabricating and subsequently changing a Large Scale Integrated (LSI) circuit chip that incorporates an electronic circuit including a Programmed Logic Array (PLA) comprising the steps of: (a) providing a set of masks including masks for contact and metallization, designed to realize said electronic circuit in said LSI chip; (b) providing, in said set of masks an area with a first set of images for defining the PLA and a second set of images being disposed adjacent to the first set of images with said second set of images being logically and physically isolated from said first set of images and including images for at least one additional product term, input line, or output line, and devices (c) fabricating said chip from said set of masks; (d) as desired to effect changes to said chip, changing the images in said masks for contacts and subsequent fabrication steps only to connect one or more of other input or output lines of said PLA to one or more of said additional input or output lines, as the case may be, or connect said additional product term to one or more input lines and one or more output lines, to realize the addition or subtraction of the devices comprising array personalization to effect said desired circuit changes; and (e) fabricating said chip with said changed set of masks.
Claim 2
Independent Claim
227 words
A method for fabricating and subsequently changing a Large Scale Integrated (LSI) circuit chip that incorporates an electronic circuit including a Programmed Logic Array (PLA) comprising the steps of: (a) providing a set of masks including masks for contact and metallization, designed to realize said electronic circuit in said LSI chip; (b) providing, in said set of masks an area with a first set of images for defining the PLA and a second set of images being disposed adjacent to the first set of images with said second set of images being logically and physically isolated from said first set of images and including images for at least one additional product term, input line, or output line, and devices (c) fabricating said chip from said set of masks; (d) as desired to effect changes to said chip, changing the images in said masks for contacts and subsequent fabrication steps only to connect one or more of other input or output lines of said PLA to one or more of said additional input or output lines, as the case may be, or connect said additional product term to one or more input lines and one or more output lines, to realize the addition or subtraction of the devices comprising array personalization to effect said desired circuit changes; and (e) fabricating said chip with said changed set of masks.
Claim 3
Dependent Claim
58 words
A method for fabricating and subsequently changing an LSI chip according to claim 1, wherein said step of providing images is performed by providing, in said set of masks, images for at least two additional product terms, two additional input lines and two additional output lines, said additional product terms and lines being logically isolated from said PLA.
Claim 4
Dependent Claim
64 words
A method for fabricating and subsequently changing an LSI chip according to claim 2, wherein said PLA has a compact configuration permitting adjacent term connections to be provided by way of a single contact, and wherein said step of providing images is performed by providing said additional product terms with devices for potential connection to every other input line and every other output line.
Claim 5
Dependent Claim
87 words
A method for fabricating and subsequently changing an LSI chip according to claim 1, wherein said step of providing a set of masks is performed by providing data input to a macro assembler corresponding to said electronic circuit; and wherein said step of providing images is performed by redefining one or more cells of the PLA so as to provide for the additional potential device connections that comprise the additional product term, input line or output line, as the case may be, electrically isolated from said PLA.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-11-13 | 1993-05-15 | 1993-11-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-11-13 | 1997-05-15 | 1997-11-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-11-13 | 2001-05-15 | 2001-11-14 | $7700.00 | Window Closed / Lapsed |