US3633268A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of producing one or more large integrated semiconductor circuits
Assignee: Telefunken Electronic GmbH
•
Filing: 1969-06-02
•
Granted: 1972-01-11
•
Expires: 1989-06-02
Abstract
Abstract The disclosure relates to a method of producing one or more integrated semiconductor circuits in which the usable basic circuits on a semiconductor wafer are connected together and the useless basic circuits bypassed. For this, a conductive path mask is produced photographically from at least two individual masks one of which represents the conductive paths to a usable basic circuit and another of which represents the paths necessary to bypass a useless basic circuit.
Inventors
- 👤 Reiner Engbert
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 17:43
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/90; H10D84/901; H10P; H10P95/00; H10W; H10W20/00; H10W20/40; Y; Y10; Y10S; Y10S438/00; Y10S438/942; Y10S438/946
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
223 words
A method of producing one or more integrated semiconductor circuits which consist of a plurality of basic circuits accommodated in a common semiconductor wafer, which method includes the steps of producing a plurality of like or different basic circuits in or on one semiconductor wafer with repeated use of the mask technique; measuring the characteristics of said basic circuits present on said semiconductor wafer and preserving the result of said measurements in a test record; providing at least two different individual masks, one of which contains the pattern of the conducting paths which lead to the electrodes Of a usable basic circuit, and the other of which contains a pattern of conducting paths which bypass the electrodes of a useless basic circuit; analyzing the test report; from the analysis of the test report, composing a conductor mask necessary for producing conducting paths between said basic circuits by selecting and lining up the individual masks, in a sequence resulting from the test report, until a complete conductive path mask for all the basic circuits of the semiconductor wafer is obtained which contains the conducting-path patterns connecting said usable basic circuits to one another; and final using the complete conductive path mask to produce the conducting paths extending over the surface of the semiconductor wafer and connecting the usable basic circuits electrically to one another.
Claim 2
Independent Claim
223 words
A method of producing one or more integrated semiconductor circuits which consist of a plurality of basic circuits accommodated in a common semiconductor wafer, which method includes the steps of producing a plurality of like or different basic circuits in or on one semiconductor wafer with repeated use of the mask technique; measuring the characteristics of said basic circuits present on said semiconductor wafer and preserving the result of said measurements in a test record; providing at least two different individual masks, one of which contains the pattern of the conducting paths which lead to the electrodes Of a usable basic circuit, and the other of which contains a pattern of conducting paths which bypass the electrodes of a useless basic circuit; analyzing the test report; from the analysis of the test report, composing a conductor mask necessary for producing conducting paths between said basic circuits by selecting and lining up the individual masks, in a sequence resulting from the test report, until a complete conductive path mask for all the basic circuits of the semiconductor wafer is obtained which contains the conducting-path patterns connecting said usable basic circuits to one another; and final using the complete conductive path mask to produce the conducting paths extending over the surface of the semiconductor wafer and connecting the usable basic circuits electrically to one another.
Claim 3
Dependent Claim
58 words
A method as defined in claim 1 wherein said a complete conductive path mask for said semiconductor wafer is produced by photographic means by repeated exposure and step-by-step displacement of interchangeable individual masks, said individual mask available being interchanged, in accordance with a schedule determined by said test report, during the photographic production of said conductive path mask.
Claim 4
Dependent Claim
120 words
A method as defined in claim 1 wherein a plurality of intermediate conducting path masks for the semiconductor wafer are produced by photographic means, by repeated exposure and step-by-step displacement of an individual mask, each intermediate mask for the semiconductor wafer containing only the configurations of an individual mask at the points arising from said test report, while exposure is prevented at all other points, all the finished intermediate masks, each of which contains only the configurations of one of the necessary individual masks, being superimposed, in register, and the stack of intermediate masks being photographed so that a photographic composite complete conductive path mask is obtained which contains the patterns of all said individual masks combined like a mosaic.
Claim 5
Dependent Claim
101 words
A method as defined in claim 1, wherein a plurality of individual masks are produced of such a number as are necessary for the manufacture of a specific large circuit from a plurality of said basic circuits, taking into consideration the occurrence of useless circuits at random points on said semiconductor wafer, and wherein said individual masks, which contain the patterns for the necessary conducting-path structures in the region of a basic circuit in each case, are strung together, in a sequence resulting from said test report, in order to produce a complete mask for the semiconductor wafer by photographic means.
Claim 6
Dependent Claim
17 words
A method as defined in claim 1, wherein different basic circuits are produced on the semiconductor wafer.
Claim 7
Dependent Claim
91 words
A method as defined in claim 1, wherein using appropriately constructed masks, different logical basic circuits are produced in integrated form on said semiconductor wafer, said logical basic circuits are measured and the result of the measurement is preserved in said test report, and said complete conductive path mask is produced in accordance with this test report by photographic combination of different individual masks, and the usable logical basic circuits present on the semiconductor wafer are connected to one another to form logical configurations by means of said conductive path mask,
Claim 8
Dependent Claim
40 words
A method as defined in claim 1, wherein the step of producing said different logical basic circuits comprises producing basic circuits selected from two or more of AND gates, NOR gates, inhibitor gates, coincidence gates, anticoincidence gates or negation gates.
Claim 9
Dependent Claim
100 words
A method as defined in claim 1, wherein said complete conductive path mask is produced photographically and therefore the surface of said semiconductor wafer containing said basic circuits is coated with a one or more layer metal coating and this is covered with a layer of photolacquer, then photolacquer is exposed via the complete conductive path mask and developed so as to leave the photolacquer onlY over the regions provided as conducting paths between said basic circuits and as connecting surfaces to the large circuit, and finally the exposed regions of said metal coating are removed in an etching process.
Claim 10
Dependent Claim
34 words
A method as defined in claim 1, wherein the results of said measurements are stored electronically and analyzed in a computer for use in producing the complete conductive path mask for the semiconductor wafer.
Claim 11
Dependent Claim
122 words
A method as defined in claim 1, wherein said basic circuits on said semiconductor wafer are selected so that different large circuits can be produced depending on the number of usable individual units of one kind of basic circuit in each case, and a computer is programmed to determine the optimum use of the basic circuits present on the semiconductor wafer on the basis of said test report which is fed into the computer, and controls photographic production of a complete conductive path mask for the semiconductor wafer by the interchange of individual masks available from an assortment, and finally, the usable basic circuits are combined to form one or more like or different large circuits by means of said complete mask.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-01-10 | 1975-07-12 | 1976-01-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-01-10 | 1979-07-12 | 1980-01-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-01-10 | 1983-07-12 | 1984-01-11 | $7700.00 | Window Closed / Lapsed |