Highly integrated programmable logic array utilizing AND and OR arrays

Claim 1

A programmable logic array (PLA) for executing different selectable logic functions determined by corresponding personalization patterns comprising: a first matrix arrangement forming an AND array having inputs and outputs; a second matrix arrangement forming an OR array and having inputs coupled to the outputs of said AND array and whose outputs provide the PLA's outputs, the AND and OR array each including a plurality of input and output lines forming crosspoints as well as a plurality of control lines for the activation of a respective one of the selectable logic functions; coupling elements provided at said crosspoints which depending on their individual personalization selectively provide an electrically conductive path at any one or more crosspoints, said coupling elements being individually formed of a respective field effect transistor having at least two adjacent gas sections associated therewith, the source-drain circuit path of each of said transistor becoming conductive under the condition that a turn-on switching potential is applied to said respectively associated at least two gate sections; first input control circuits associated with said AND array for providing signals to the inputs of said AND array; second input control circuits associated with said OR array and responsive to outputs of said AND array for providing signals to inputs of said OR array, said first and second control circuits being adapted to activate coupling elements at crosspoints not being used for a particular function for providing electrically conductive paths while at the same time inactivating the coupling elements formerly used in effecting functional cross-points for disconnecting previously provided electrically conductive paths.