US4053793A
Expired / Lapsed
US
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Modular logic circuit for performing different logic functions
Assignee: Siemens AG
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Filing: 1976-03-25
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Granted: 1977-10-11
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Expires: 1996-03-25
Abstract
Abstract A modular logic circuit capable of performing a plurality of different logic functions is described. A first portion of the modular circuit containing logic elements receives input pulse signals and, responsive to signals received from a control circuit forming a second portion of the modular circuit, produces an output pulse having time position and/or length relationships to the input pulses which are functions of the values of the signals from the control circuit. A third portion of the modular circuit receives input pulses having no relationship to the inputs to the first portion; logic circuits in the third portion receive the latter input pulses and signals from the control circuit and produce another output signal the length and/or time position of which in relation to the input pulses is determined by the signals from the control unit.
Inventors
- 👤 Wolfram Ernst
- 👤 Josef Rohrig
- 👤 Gerhard Renz
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 16:28
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/173; H03K19/1733
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
147 words
A modular logic circuit for performing a plurality of differing logic functions comprising: first, second and third portions, said first portion comprising first logic circuit means for receiving first input pulse signals and for producing a first output pulse signal having a predetermined length and time position relationship to said first input pulse signals, said third portion comprising third logic circuit means for receiving a third input pulse signal which is independent of said first input pulse signals and for producing a third output pulse signal having a predetermined length and time position relationship with said third input pulse signal, said second portion comprising second logic circuit means including means for receiving control input signals and for producing therefrom control output signals, said control output signals having levels which cause said first and third logic circuit means to selectively produce said predetermined length and time position relationships.
Claim 2
Dependent Claim
147 words
A modular logic circuit for performing a plurality of differing logic functions comprising: first, second and third portions, said first portion comprising first logic circuit means for receiving first input pulse signals and for producing a first output pulse signal having a predetermined length and time position relationship to said first input pulse signals, said third portion comprising third logic circuit means for receiving a third input pulse signal which is independent of said first input pulse signals and for producing a third output pulse signal having a predetermined length and time position relationship with said third input pulse signal, said second portion comprising second logic circuit means including means for receiving control input signals and for producing therefrom control output signals, said control output signals having levels which cause said first and third logic circuit means to selectively produce said predetermined length and time position relationships.
Claim 3
Dependent Claim
29 words
The modular logic circuit defined in claim 1 further comprising: means for selectively displacing in time the leading and trailing edges of said first and third output pulse signals.
Claim 4
Dependent Claim
37 words
The modular logic circuit defined in claim 1 wherein said second portion further comprises blocking means for selectively enabling and disabling said first and third output signals responsive to additional control signals coupled to said blocking means.
Claim 5
Dependent Claim
34 words
The modular logic circuit defined in claim 3 wherein said second portion further comprises: means for producing a second output signal indicating enabling of said first and third output signals by said blocking means.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-10-10 | 1981-04-11 | 1981-10-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-10-10 | 1985-04-11 | 1985-10-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-10-10 | 1989-04-11 | 1989-10-11 | $7700.00 | Window Closed / Lapsed |