Abstract A MOS sense amplifier having a differential input and a single-ended output, and formed of only six MOS transistors. The amplifier's non-inverting input is connected to the gates of first and second MOSFETs. The drains of the first and second MOSFETs are connected to each other and to the gates of third and fourth MOSFETs. The drain of the third MOSFET is connected to the sources of the second and sixth MOSFETs; and the source of the third MOSFET is connected to the positive supply voltage. The drain of the fourth MOSFET is connected to the sources of the first and fifth MOSFETs. The source of the fourth MOSFET is connected to ground. The inverting input of the sense amplifier is connected to the gates of the fifth and sixth MOSFETs. The drains of the fifth and sixth MOSFETs are connected to each other and provide the output terminus of the amplifier. The first, fourth and fifth MOSFETs are n-channel devices, while the second, third and sixth MOSFETs are p-channel devices.
A sense amplifier having non-inverting and inverting inputs for connection, respectively, to first and second bit lines which, in turn, communicate with at least one MOS memory cell, such amplifier also having an output and comprising: a. first through sixth MOS transistors, each having source, drain and gate electrodes; b. the non-inverting input being connected to the gate electrodes of the first and second MOS transistors; c. the drain electrodes of the first and second MOS transistors being connected to each other and to the gate electrodes of the third and fourth MOS transistors; d. the source electrodes of the first and fifth MOS transistors being connected to each other and to the drain electrode of the fourth MOS transistor; e. the source electrode of the fourth MOS transistor being connected to ground; f. the source electrode of the third MOS transistor being connected to the supply voltage; g. the drain electrode of the third MOS transistor being connected to the source electrodes of the second and sixth MOS transistors; h. the inverting input being connected to the gates of the fifth and sixth MOS transistors; and i. the drain electrodes of the fifth and sixth MOS transistors being connected to each other and to the sense amplifier output.
Claim 2
Dependent Claim
209 words
A sense amplifier having non-inverting and inverting inputs for connection, respectively, to first and second bit lines which, in turn, communicate with at least one MOS memory cell, such amplifier also having an output and comprising: a. first through sixth MOS transistors, each having source, drain and gate electrodes; b. the non-inverting input being connected to the gate electrodes of the first and second MOS transistors; c. the drain electrodes of the first and second MOS transistors being connected to each other and to the gate electrodes of the third and fourth MOS transistors; d. the source electrodes of the first and fifth MOS transistors being connected to each other and to the drain electrode of the fourth MOS transistor; e. the source electrode of the fourth MOS transistor being connected to ground; f. the source electrode of the third MOS transistor being connected to the supply voltage; g. the drain electrode of the third MOS transistor being connected to the source electrodes of the second and sixth MOS transistors; h. the inverting input being connected to the gates of the fifth and sixth MOS transistors; and i. the drain electrodes of the fifth and sixth MOS transistors being connected to each other and to the sense amplifier output.