Sense amplifier circuit

Claim 2

A sense amplifier circuit comprising: first and second differential amplifiers connected to a first power supply line, each comprising means for receiving first and second input signals to said sense amplifier with opposite phases and for supplying first and second output signals with opposite phases; a first reference transistor connected between the first differential amplifier and a second power supply line and controlled by the first output signal of said second differential amplifier, whose phase is the same as that of said first input signal; a second reference transistor connected between said second differential amplifier and said second power supply line and controlled by the first output signal of said first differential amplifier, whose phase is the same as that of said second input signal; and means for providing two output signals from said sense amplifier circuit having opposite phase, each being selected from said first and second output signals of different ones of said first and second differential amplifiers.

Claim 3

The circuit of claim 1, comprising a third reference transistor connected in parallel to said first reference transistor and being controlled by said first input signal.

Claim 4

The circuit of claim 1 or 2, comprising a further reference transistor connected in parallel to said second reference transistor and means for controlling said further reference transistor by said second input signal.

Claim 5

The circuit of claim 1, comprising a third reference transistor connected in parallel to said first reference transistor and means for controlling said third reference transistor by said second output signal of said first differential amplifier.

Claim 6

The circuit of claim 1 or 4, comprising another reference transistor connected in parallel to said second reference transistor and means for controlling said another reference transistor by said second output signal of said second differential amplifier.

Claim 7

A sense amplifier circuit comprising: first and second differential amplifiers connected to a first power supply line, each of which comprises means for receiving first and second input signals with opposite phases and for supplying first and second output signals of opposite phases; a first reference transistor connected between said first differential amplifier and a second power supply line and controlled by said first input signal; a second reference transistor connected between said second differential amplifier and said second power supply line and controlled by the first output signal of the first differential amplifier whose phase is the same as that of said second input signal; and means for providing two output signals of said sense amplifier circuit, the first being the second output signal of said first differential amplifier and the second being a first output signal of said second differential amplifier whose phases are the same as those of said second and first input signals, respectively.

Claim 8

A sense amplifier circuit comprising: first and second differential amplifiers connected to a first power supply line, each of which comprises means for receiving first and second input signals with opposite phases and for supplying first and second output signals of opposite phases; a first reference transistor connected between said first differential amplifier and a second power supply line and controlled by said first input signal; a second reference transistor connected between said second differential amplifier and said second power supply line and controlled by the first output signal of the first differential amplifier whose phase is the same as that of said second input signal; and means for providing two output signals of said sense amplifier circuit, the first being the second output signal of said first differential amplifier and the second being a first output signal of said second differential amplifier whose phases are the same as those of said second and first input signals, respectively.

Claim 9

A fast sense amplifier having changing reference voltages comprising two differential amplifiers, connected to a first common voltage supply, each said differential amplifier comprising means for receiving two input signals to said sense amplifier of opposite phases and for supplying two output signals of opposite phase, at least one reference transistor for producing each respective changing reference voltage connected between each said differential amplifier and a second common voltage supply, means for controlling one of said at least one reference transistor connected to a first one of said differential amplifiers by a respective selected one of said two output signals of the second differential amplifier, and for controlling one of said at least one reference transistor of the second differential amplifier by a signal selected from said two input signals and said two output signals of said first differential amplifier, each said control signal for each said reference transistor of the first differential amplifier being opposite in phase from each said control signal for each said reference transistor of said second differential amplifier, and means for providing two outputs from said sense amplifier, each said sense amplifier output being selected from one of said outputs of each said differential amplifier so that said two sense amplifier outputs have opposite phase, wherein the reference voltages provided by said reference transistors are changed during the operation of the fast sense amplifier.

Claim 10

A fast sense amplifier having changing reference voltages comprising two differential amplifiers, connected to a first common voltage supply, each said differential amplifier comprising means for receiving two input signals to said sense amplifier of opposite phases and for supplying two output signals of opposite phase, at least one reference transistor for producing each respective changing reference voltage connected between each said differential amplifier and a second common voltage supply, means for controlling one of said at least one reference transistor connected to a first one of said differential amplifiers by a respective selected one of said two output signals of the second differential amplifier, and for controlling one of said at least one reference transistor of the second differential amplifier by a signal selected from said two input signals and said two output signals of said first differential amplifier, each said control signal for each said reference transistor of the first differential amplifier being opposite in phase from each said control signal for each said reference transistor of said second differential amplifier, and means for providing two outputs from said sense amplifier, each said sense amplifier output being selected from one of said outputs of each said differential amplifier so that said two sense amplifier outputs have opposite phase, wherein the reference voltages provided by said reference transistors are changed during the operation of the fast sense amplifier.

Claim 11

The amplifier of claim 7 comprising the reference transistor of the second differential amplifier being controlled by a first output of the first differential amplifier having phase opposite to that of said first output of the second differential amplifier.

Claim 12

The amplifier of claim 8, said two outputs of said sense amplifier being the first outputs of said differential amplifiers.

Claim 13

The amplifier of claim 8, said two outputs of said sense amplifier being the second outputs of said differential amplifiers.

Claim 14

The amplifier of claim 7, comprising said reference transistor connected to the second differential amplifier being controlled by the output of the first differential amplifier having phase opposite to said first input signal.

Claim 15

The amplifier of claim 11, said output signals of said sense amplifier comprising said first output of said first differential amplifier and the respective output of the second differential amplifier for providing said sense amplifier outputs with said opposite phase.

Claim 16

The amplifier of claim 11, said output signals of said fast sense amplifier comprising the output of said first differential amplifier, having the same phase as said first input signal, and the respective output of the second differential amplifier, for providing said opposite phases of said fast sense amplifier outputs.

Claim 17

The circuit of claim 1, 6, 7, 8, 9, 10, 11, 12 or 13, wherein each of said differential amplifiers comprises: first and second load transistors connected to said first power supply line; first and second input transistors connected in series to said first and second load transistors, respectively; means for supplying to the gates of said first and second input transistors said first and second input signals, respectively; and said means for supplying said two outputs of each said differential amplifier comprising means for supplying the voltages of the node connecting said first load transistor and said first input transistor and from the node connecting said second load transistor and said second input transistor.

Claim 18

The amplifier of claim 7, 8, 9, 10, 11, 12 or 13, comprising two reference transistors connected to each said differential amplifier, each said second reference transistor being supplied with a respective one of said two input signals and said two output signals of said differential amplifiers having the same phase as the signal controlling the other reference transistor of the same differential amplifier.