Diffused field CMOS-bulk process

Claim 1

A CMOS process for forming an N-channel device and a P-channel device on a P doped substrate while minimizing birdsbeak encroachment and the effects of parasitic transistors and establishing substantial radiation immunity, comprising the steps of: delineating an active region surrounded by field for the N-channel device comprising a thin layer of oxide of 50-200 A thick, a layer of nitride of 800-1500 A thick and a further low temperature layer of low temperature oxide; delineating an active region surrounded by field for the P-channel device comprising a thin layer of oxide and a layer of nitride in the above dimensions; said delineating comprising using a dry reactive ion etch to etch away the thin layer of oxide and nitride in both channels and the low temperature layer of oxide for the N-channel substantially vertically of the substrate along the peripheries of each active region to maintain strength in the nitride layer by preserving its thickness to resist direct encroachment of field oxide therebeneath; implanting a N-well beneath the P-channel active region and in the surrounding field region adjacent to the P-channel active region; implanting the N-channel field with P type ions but not the active region thereof; removing the further low temperature oxide layer from the N-channel active region; rapidly growing field oxide for both channels at approximately 1165° C. in a steam environment for 40-50 minutes using the Pyrogenic water system to control the field oxidation thickness to approximately 6000 to 7000 A while concurrently driving-in the well implant and the field implant to render an abrupt transition from field oxide to active region to reduce sidewalk effect, further harden the nitride, and reduce birdsbeak effect; removing the nitride layers; growing sacrificial oxide and removing the same; implanting threshold adjust; growing gate oxide; delineating a gate of doped polysilicon for each channel; establishing an activated source and drain for each channel; depositing crossover oxide; and, establishing metal contacts to each source and drain and to the gate polysilicon through the crossover oxide.