Patent US4565712A successfully refreshed from Google Patents.
US4565712A
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Method of making a semiconductor read only memory
Assignee: Toshiba Corp
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Filing: 1984-05-23
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Granted: 1986-01-21
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Expires: 2004-05-23
Abstract
Abstract A semiconductor read only memory having a plurality of MOS transistors and polycrystalline or amorphous silicon resistances connected to the source or drain regions of the MOS transistors, laser beams irradiating selected silicon resistances to thermally activate those resistances and store the required data.
Inventors
- 👤 Hideo Noguchi
- 👤 Tugunari Iwamoto
- 👤 Sakae Takei
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 22:09
CPC Classifications
H; H10; H10D; H10D88/00; G; G05; G05F; G05F1/00; G05F1/10; G05F1/625; G05F1/63; G05F1/648; G11; G11C; G11C17/00; G11C17/08; H10W; H10W20/00; H10W20/40; H10W20/49
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
74 words
A method of manufacturing a semiconductor read only memory comprising the steps of: forming a plurality of MOS transistors on the surface of a semiconductor substrate, connecting a plurality of silicon resistances to source and drain regions of said MOS transistors respectively, forming an insulator film on the surface of said substrate to provide an unactivated ROM, and irradiating with a laser beam selected silicon resistances through said insulator film to activate said ROM.
Claim 2
Independent Claim
74 words
A method of manufacturing a semiconductor read only memory comprising the steps of: forming a plurality of MOS transistors on the surface of a semiconductor substrate, connecting a plurality of silicon resistances to source and drain regions of said MOS transistors respectively, forming an insulator film on the surface of said substrate to provide an unactivated ROM, and irradiating with a laser beam selected silicon resistances through said insulator film to activate said ROM.
Claim 3
Dependent Claim
21 words
A method of manufacturing a semiconductor read only memory as in claim 1, wherein said silicon resistances are polycrystalline or amorphous.
Claim 4
Dependent Claim
17 words
A method as in claim 1 including the further step of storing said unactivated ROM before irradiation.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-01-20 | 1989-07-22 | 1990-01-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-01-20 | 1993-07-22 | 1994-01-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-01-20 | 1997-07-22 | 1998-01-21 | $7700.00 | Window Closed / Lapsed |