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US4476478A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor read only memory and method of making the same

Assignee: Toshiba Corp
•
Filing: 1981-03-19
•
Granted: 1984-10-09
•
Expires: 2001-03-19
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Abstract

Abstract A semiconductor read only memory having a plurality of MOS transistors and polycrystalline or amorphous silicon resistances connected to the source or drain regions of the MOS transistors, laser beams irradiating selected silicon resistances to thermally activate those resistances and store the required data.

Inventors

  • 👤 Hideo Noguchi
  • 👤 Tugunari Iwamoto
  • 👤 Sakae Takei

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 19:21
CPC Classifications
H; H10; H10D; H10D88/00; G; G05; G05F; G05F1/00; G05F1/10; G05F1/625; G05F1/63; G05F1/648; G11; G11C; G11C17/00; G11C17/08; H10W; H10W20/00; H10W20/40; H10W20/49

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 123 words
A semiconductor read only memory comprising: (a) a semiconductor substrate of a first conductivity type; (b) a plurality of regions of a second conductivity type, opposite to said first conductivity type formed in the semiconductor substrate; (c) a plurality of gate electrodes bridging two adjacent second conductivity type regions through insulating layers, said second conductivity type regions, gate electrodes and insulating layers forming series connected MOS transistors; and (d) silicon resistances connected between adjacent second conductivity type regions through an insulating layer and each being positioned over a gate electrode of a MOS transistor, (e) a passivation film formed over all the semiconductor substrate, and wherein said silicon resistances being selectively activatable by laser beam irradiation so as to decrease the resistance thereof.
Claim 2
Dependent Claim 123 words
A semiconductor read only memory comprising: (a) a semiconductor substrate of a first conductivity type; (b) a plurality of regions of a second conductivity type, opposite to said first conductivity type formed in the semiconductor substrate; (c) a plurality of gate electrodes bridging two adjacent second conductivity type regions through insulating layers, said second conductivity type regions, gate electrodes and insulating layers forming series connected MOS transistors; and (d) silicon resistances connected between adjacent second conductivity type regions through an insulating layer and each being positioned over a gate electrode of a MOS transistor, (e) a passivation film formed over all the semiconductor substrate, and wherein said silicon resistances being selectively activatable by laser beam irradiation so as to decrease the resistance thereof.
Claim 3
Dependent Claim 17 words
A semiconductor read only memory as in claim 1, wherein said silicon resistances are polycrystalline or amorphous.
Claim 4
Dependent Claim 184 words
A semiconductor read only memory comprising: (a) a semiconductor substrate of a first conductivity type; (b) first to fifth regions of a second conductivity type opposite to said first conductivity type formed in the semiconductor substrate; (c) a first gate electrode bridging the first and second regions of said second conductivity type through an insulating layer, said first gate electrode, first and second regions and the insulating layer forming a first MOS transistor; (d) a second gate electrode bridging the second and third regions of said second conductivity type through an insulating layer, said second gate electrode, second and third regions and insulating layer forming a second MOS transistor; (e) a first silicon resistance connected between the first and fourth regions of second conductivity type through and insulating layer; and (f) a second silicon resistance connected between the third and fifth regions of said second conductivity type through an insulating layer, (g) a passivation film formed over all of the semiconductor substrate, and wherein said first and second silicon resistances being selectively activatable by laser beam irradiation so as to decrease the resistance thereof.
Claim 5
Dependent Claim 184 words
A semiconductor read only memory comprising: (a) a semiconductor substrate of a first conductivity type; (b) first to fifth regions of a second conductivity type opposite to said first conductivity type formed in the semiconductor substrate; (c) a first gate electrode bridging the first and second regions of said second conductivity type through an insulating layer, said first gate electrode, first and second regions and the insulating layer forming a first MOS transistor; (d) a second gate electrode bridging the second and third regions of said second conductivity type through an insulating layer, said second gate electrode, second and third regions and insulating layer forming a second MOS transistor; (e) a first silicon resistance connected between the first and fourth regions of second conductivity type through and insulating layer; and (f) a second silicon resistance connected between the third and fifth regions of said second conductivity type through an insulating layer, (g) a passivation film formed over all of the semiconductor substrate, and wherein said first and second silicon resistances being selectively activatable by laser beam irradiation so as to decrease the resistance thereof.
Claim 6
Dependent Claim 17 words
A semiconductor read only memory according to claim 1 or 3 wherein said silicon resistances are polycrystalline.
Claim 7
Dependent Claim 17 words
A semiconductor read only memory according to claim 1 or 3 wherein said silicon resistances are amorphous.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1987-10-09 1988-04-09 1988-10-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1991-10-09 1992-04-09 1992-10-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1995-10-09 1996-04-09 1996-10-09 $7700.00 Window Closed / Lapsed

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