Patent US4859869A successfully refreshed from Google Patents.
Patent US6627933B2 successfully refreshed from Google Patents.
US6627933B2
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of forming minimally spaced word lines
Assignee: Round Rock Research LLC
•
Filing: 2002-10-23
•
Granted: 2003-09-30
•
Expires: 2022-10-23
Abstract
Abstract A method of forming minimally spaced word lines is disclosed. A double exposure technique is employed at the gate formation level. A small trench is defined through gate stack layers by using a tapered etch or spacers to achieve the desired width of the trench. A filler material fills the trench and forms a filler plug. The gate layers adjacent to the trench are then patterned and etched and the filler plug is removed to obtain gate stacks spaced apart by a distance of less than about 400 Angstroms.
Inventors
- 👤 Werner Juengling
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 17:55
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/05; H10B12/30; H10B12/48; H10B12/488; H10B12/31; H10B12/312
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
39 words
A memory structure comprising: a plurality of word lines formed over a semiconductor substrate, at least two adjacent ones of said plurality of word lines being spaced apart from each other by a distance of less than 400 Angstroms.
Claim 2
Dependent Claim
39 words
A memory structure comprising: a plurality of word lines formed over a semiconductor substrate, at least two adjacent ones of said plurality of word lines being spaced apart from each other by a distance of less than 400 Angstroms.
Claim 3
Dependent Claim
24 words
The memory structure of claim 1 further comprising a plurality of bit lines formed over and in contact with said plurality of word lines.
Claim 4
Dependent Claim
40 words
The memory structure of claim 1 , further comprising an isolation region formed below said at least two adjacent ones of said plurality of word lines being spaced apart from each other by a distance of less than 400 Angstroms.
Claim 5
Dependent Claim
22 words
The memory structure of claim 1 , wherein each of said plurality of word lines further comprises a plurality of gate layers.
Claim 6
Dependent Claim
19 words
The memory structure of claim 4 , wherein each of said plurality of word lines includes a polysilicon layer.
Claim 7
Dependent Claim
20 words
The memory structure of claim 4 , wherein each of said plurality of word lines includes a metal silicide layer.
Claim 8
Dependent Claim
15 words
The memory structure of claim 1 , wherein said memory structure is a DRAM structure.
Claim 9
Dependent Claim
15 words
The memory structure of claim 1 , wherein said memory structure is a SRAM structure.
Claim 10
Dependent Claim
59 words
A memory device comprising a plurality of DRAM cells, said DRAM cells including a plurality of word lines formed over a semiconductor substrate, at least two of said plurality of word lines being spaced apart from each other by a distance less than about 400 Angstroms, and a plurality of bit lines formed over said plurality of word lines.
Claim 11
Dependent Claim
59 words
A memory device comprising a plurality of DRAM cells, said DRAM cells including a plurality of word lines formed over a semiconductor substrate, at least two of said plurality of word lines being spaced apart from each other by a distance less than about 400 Angstroms, and a plurality of bit lines formed over said plurality of word lines.
Claim 12
Dependent Claim
41 words
The memory device of claim 9 further comprising an isolation region formed below and in contact with said at least two of said plurality of word lines being spaced apart from each other by a distance less than about 400 Angstroms.
References Cited (Backward Citations)
US5100826A
Cited
US5677867A
Cited
US5597763A
Cited
US5677563A
Cited
US5654570A
Cited
US5786250A
Cited
US6215690B1
Cited
US6238974B1
Cited
US6133599A
Cited
US6372651B1
Cited
US6010933A
Cited
US5977601A
Cited
US6410385B2
Cited
US6134137A
Cited
US6399433B2
Cited
US6297090B1
Cited
US6136716A
Cited
US20020000596A1
Cited
US6426175B2
Cited
US6225203B1
Cited
US6368988B1
Cited
US6451649B2
Cited
US20020102863A1
Cited
US6365454B1
Cited
US6429106B1
Cited
US6451651B1
Cited
US20030008461A1
Cited
US20020132397A1
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2006-09-29 | 2007-03-31 | 2007-09-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2010-09-29 | 2011-03-31 | 2011-09-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2014-09-29 | 2015-03-31 | 2015-09-30 | $7700.00 | Window Closed / Lapsed |