Patent US6587142B1 successfully refreshed from Google Patents.
US6587142B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Low-noise active-pixel sensor for imaging arrays with high speed row reset
Assignee: Re Secured Networks LLC
•
Filing: 1998-10-01
•
Granted: 2003-07-01
•
Expires: 2018-10-01
Abstract
Abstract An active pixel sensor circuit including a photodetector, a first MOS transistor functioning as the driver of a source follower amplifier during signal readout, a second MOS transistor serving as a pixel readout transistor, a third MOS transistor serving as a photodetector reset transistor, and a reset noise cancellation circuit including a fourth MOS transistor, first and second capacitances, and an amplifier having a gain which is a specified multiple of the ratio of the first to the second capacitance. The first capacitance is connected in parallel to the photodector. The amplifier reduces the reset noise caused by resetting the photodector without having to implement correlated double sampling.
Inventors
- 👤 Lester J. Kozlowski
- 👤 David L. Standley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 11:12
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/04; H03F3/08; H03F3/087; H04; H04N; H04N25/00; H04N25/60; H04N25/65; H04N25/70; H04N25/76; H04N25/77; H04N25/771; H04N25/78
Claims Analysis
Total Claims: 35
Claim 1
Independent Claim
79 words
An active pixel circuit having a photodetector, a source follower driver transistor, a row select transistor, a reset transistor, and a fourth transistor, the circuit comprising: a first capacitor connected in parallel with the photodetector; a second capacitor connected between the reset transistor and the fourth transistor; and a feedback amplifier connected between the row select transistor and the fourth transistor, wherein the gain of the amplifier equals a specified multiple of a reciprocal of a linear attenuation factor.
Claim 2
Dependent Claim
79 words
An active pixel circuit having a photodetector, a source follower driver transistor, a row select transistor, a reset transistor, and a fourth transistor, the circuit comprising: a first capacitor connected in parallel with the photodetector; a second capacitor connected between the reset transistor and the fourth transistor; and a feedback amplifier connected between the row select transistor and the fourth transistor, wherein the gain of the amplifier equals a specified multiple of a reciprocal of a linear attenuation factor.
Claim 3
Dependent Claim
31 words
The circuit of claim 1 , wherein the reciprocal of the linear attenuation factor is a ratio of the value of the first capacitor to the value of the second capacitor.
Claim 4
Dependent Claim
18 words
The circuit of claim 2 , wherein the feedback amplifier reduces reset noise caused by resetting the photodetector.
Claim 5
Dependent Claim
28 words
The circuit of claim 3 , further comprising a third capacitor connected between a node, formed by the fourth transistor and the second capacitor, and a circuit ground.
Claim 6
Dependent Claim
125 words
An active pixel sensor circuit comprising: (a) a photodetector element having a node; (b) a first transistor having a control leg connected to the node and second and third legs, the third leg being connected to a power supply voltage; (c) a second transistor having a control leg and fourth and fifth legs, the fourth leg connected to the second leg of the first transistor; (d) a third transistor having a control leg and sixth and seventh legs, the seventh leg being connected to a reset voltage source; (e) a fourth transistor having a control leg and eighth and ninth legs; (f) a first capacitance connected in parallel to the photodector; and (g) a second capacitance formed between the eighth leg and the sixth leg.
Claim 7
Dependent Claim
125 words
An active pixel sensor circuit comprising: (a) a photodetector element having a node; (b) a first transistor having a control leg connected to the node and second and third legs, the third leg being connected to a power supply voltage; (c) a second transistor having a control leg and fourth and fifth legs, the fourth leg connected to the second leg of the first transistor; (d) a third transistor having a control leg and sixth and seventh legs, the seventh leg being connected to a reset voltage source; (e) a fourth transistor having a control leg and eighth and ninth legs; (f) a first capacitance connected in parallel to the photodector; and (g) a second capacitance formed between the eighth leg and the sixth leg.
Claim 8
Dependent Claim
38 words
The apparatus of claim 5 further including an amplifier having an output connected to the ninth leg, the amplifier having a gain equal to a specified multiple of the ratio of the first capacitance to the second capacitance.
Claim 9
Dependent Claim
17 words
The circuit of claim 6 , wherein the amplifier reduces reset noise caused by resetting the photodetector.
Claim 10
Dependent Claim
18 words
The apparatus of claim 7 wherein each of the first, second, third and fourth transistors comprises a MOSFET.
Claim 11
Dependent Claim
13 words
The apparatus of claim 8 wherein each the MOSFET is fabricated in CMOS.
Claim 12
Dependent Claim
18 words
The apparatus of claim 8 wherein the photodetector comprises a substrate diode with a silicide portion thereof removed.
Claim 13
Dependent Claim
23 words
The apparatus of claim 5 wherein the second capacitance comprises an overlapping portion of the node and an interconnect layer of the diode.
Claim 14
Dependent Claim
19 words
The apparatus of claim 5 wherein the second capacitance comprises a first interconnect layer overlapping a second interconnect layer.
Claim 15
Dependent Claim
15 words
The apparatus of claim 5 wherein the second interconnect layer is a photodiode interconnect layer.
Claim 16
Dependent Claim
19 words
The apparatus of claim 8 wherein the photodetector comprises an n on p photodiode junction in a p-type substrate.
Claim 17
Dependent Claim
19 words
The apparatus of claim 8 wherein the photodetector comprises a p on n photodiode junction in an n-type substrate.
Claim 18
Dependent Claim
18 words
The apparatus of claim 5 comprising a third capacitance formed between the eight leg and the sixth leg.
Claim 19
Dependent Claim
117 words
In an active pixel circuit including a photodetector, a source follower driver MOS transistor, a row select MOS transistor, a reset MOS transistor, a fourth MOS transistor, and first and second capacitances, the first capacitance connected in parallel to the photodetector, a method for reducing reset noise, the method comprising: arranging the first and second capacitances to apply a ratio of the values thereof to a voltage on one of them; reading out the voltage on the photodetector; resetting the photodetector; and canceling reset noise created by resetting the photodetector by applying a gain which is a specified multiple of the inverse of the ratio to generate a noise cancellation signal for supply to the fourth transistor.
Claim 20
Dependent Claim
117 words
In an active pixel circuit including a photodetector, a source follower driver MOS transistor, a row select MOS transistor, a reset MOS transistor, a fourth MOS transistor, and first and second capacitances, the first capacitance connected in parallel to the photodetector, a method for reducing reset noise, the method comprising: arranging the first and second capacitances to apply a ratio of the values thereof to a voltage on one of them; reading out the voltage on the photodetector; resetting the photodetector; and canceling reset noise created by resetting the photodetector by applying a gain which is a specified multiple of the inverse of the ratio to generate a noise cancellation signal for supply to the fourth transistor.
Claim 21
Dependent Claim
34 words
The method of claim 17 wherein the step of reading out the voltage on the photodetector includes the step of holding off the reset MOS transistor and turning on the row select MOS transistor.
Claim 22
Dependent Claim
22 words
The method of claim 18 wherein the step of resetting the photodetector comprises the step of fully enabling the reset MOS transistor.
Claim 23
Dependent Claim
34 words
The method of claim 18 wherein the step of reading out the voltage further includes the step of programming a feedback amplifier to a gain selected to provide desired signal sensitivity for optimum imaging.
Claim 24
Dependent Claim
34 words
The method of claim 17 wherein the step of canceling reset noise includes the step of setting a gain of a feedback amplifier equal to a specified multiple of the inverse of the ratio.
Claim 25
Dependent Claim
34 words
The method of claim 21 wherein the step of reading out the voltage further includes the step of programming the feedback amplifier to a gain selected to provide desired signal sensitivity for optimum imaging.
Claim 26
Dependent Claim
38 words
The method of claim 21 wherein the step of canceling the reset noise further comprises the step of enabling the fourth transistor to close a feedback loop to the first capacitance, the feedback loop including the feedback amplifier.
Claim 27
Dependent Claim
20 words
The method of claim 23 wherein the second capacitance supplies a normalizing signal to an integrating node of the photodiode.
Claim 28
Dependent Claim
17 words
The method of claim 24 further including the step of canceling offset created by the feedback amplifier.
Claim 29
Dependent Claim
76 words
In an imager pixel including a photodetector having a node and further having first, second, third and fourth transistors, a method of improving performance comprising: creating a first capacitance in parallel with the photodetector; creating a second capacitance in the pixel adjacent the node, the first and second capacitances having a ratio; and employing an amplifier having a gain which is a specified multiple of the ratio to cancel reset noise resulting from resetting the photodetector.
Claim 30
Dependent Claim
76 words
In an imager pixel including a photodetector having a node and further having first, second, third and fourth transistors, a method of improving performance comprising: creating a first capacitance in parallel with the photodetector; creating a second capacitance in the pixel adjacent the node, the first and second capacitances having a ratio; and employing an amplifier having a gain which is a specified multiple of the ratio to cancel reset noise resulting from resetting the photodetector.
Claim 31
Dependent Claim
16 words
The method of claim 26 wherein the first, second, third and fourth transistors comprise MOS transistors.
Claim 32
Dependent Claim
97 words
An imager pixel comprising: a photodetector; a first capacitance connected in parallel to the photodector; a second capacitance adjacent the photodetector and connected so as to supply a voltage on the first capacitance to the photodetector while multiplying that voltage by the ratio of the second capacitance to the first capacitance; a first transistor means for functioning as the driver of a source follower amplifier during signal readout; second transistor means for controlling signal readout; third transistor means for serving as a reset switch; and a fourth transistor means for transferring a voltage to the first capacitance.
Claim 33
Dependent Claim
97 words
An imager pixel comprising: a photodetector; a first capacitance connected in parallel to the photodector; a second capacitance adjacent the photodetector and connected so as to supply a voltage on the first capacitance to the photodetector while multiplying that voltage by the ratio of the second capacitance to the first capacitance; a first transistor means for functioning as the driver of a source follower amplifier during signal readout; second transistor means for controlling signal readout; third transistor means for serving as a reset switch; and a fourth transistor means for transferring a voltage to the first capacitance.
Claim 34
Dependent Claim
16 words
The imager pixel of claim 28 and further including a feedback circuit for generating the voltage.
Claim 35
Dependent Claim
23 words
The invention of claim 29 wherein the feedback circuit includes an amplifier having a gain which is a specified multiple of the ratio.
References Cited (Backward Citations)
US4249122A
Cited
US4463383A
Cited
US4466018A
Cited
US4676761A
Cited
JPS6336612A
Cited
US4794247A
Cited
US5043820A
Cited
US5345266A
Cited
USRE34908E
Cited
US5083016A
Cited
JPH04345261A
Cited
US5296696A
Cited
US5357129A
Cited
US5471515A
Cited
US5650643A
Cited
US5541402A
Cited
US5576763A
Cited
WO1996041464A1
Cited
US6111606A
Cited
US6300978B1
Cited
US5936866A
Cited
DE19533061A1
Cited
US5587596A
Cited
US5608243A
Cited
US5708263A
Cited
US5654755A
Cited
US5892540A
Cited
US5831258A
Cited
US6320616B1
Cited
EP0905788A2
Cited
US6317154B2
Cited
US6194696B1
Cited
US6091280A
Cited
US6160282A
Cited
US6040593A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2006-06-30 | 2006-12-30 | 2007-07-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2010-06-30 | 2010-12-30 | 2011-07-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2014-06-30 | 2014-12-30 | 2015-07-01 | $7700.00 | Window Closed / Lapsed |