Structure and method for probing wiring bond pads

Claim 1

A metohod for forming an integrated circuit device having wire bond pads that are easily probed, comprising the steps of: providing a mounting surface and an integrated circuit chip thereon, said integrated circuit chip having a plurality of wire bond pads within a single layer of the integrated circuit chip; providing a plurality of pad extensions electrically connected to said wire bond pads, each said pad extension adapted to receive a probe; and providing, a probe ring structure on the integrated circuit chip, wherein each wire bond pad has a first area for receiving a wire bond, wherein the first areas and pad extensions are integrally formed around a central chip location, and wherein the first areas and pad extensions are in substantially coplanar electrical communication with each other, and wherein the pad extension is connected to at least one corresponding probe ring pad of the probe ring structure via at least one probe.

Claim 8

A method for performing failure analysis on an integrated circuit after packaging is completed and a fault has been detected, wherein the integrated circuit comprises wire bond pads each having a pad extension formed substantially integrally and simultaneously with the pad, wherein said pad extensions are formed extending from a central chip location, and wherein said pad extensions are adjacent to a portion of the pad having a wire bond, said method comprising the steps of: removing a portion of a lead frame packaging to expose the wire bond pads; probing the pad extension of a first wire bond pad of the wire bond pads, with the wire bond remaining affixed to said first wire bond pad; and providing a probe ring structure wherein the wire bond pads are electrically connected to at least one corresponding probe ring pad of the probe ring structure via at least one probe.

Claim 9

A method for performing failure analysis on an integrated circuit after packaging is completed and a fault has been detected, wherein the integrated circuit comprises wire bond pads each having a pad extension formed substantially integrally and simultaneously with the pad, wherein said pad extensions are formed extending from a central chip location, and wherein said pad extensions are adjacent to a portion of the pad having a wire bond, said method comprising the steps of: removing a portion of a lead frame packaging to expose the wire bond pads; probing the pad extension of a first wire bond pad of the wire bond pads, with the wire bond remaining affixed to said first wire bond pad; and providing a probe ring structure wherein the wire bond pads are electrically connected to at least one corresponding probe ring pad of the probe ring structure via at least one probe.