US6376318B1
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Method of manufacturing a semiconductor device
Assignee: SK Hynix Inc
•
Filing: 2000-06-30
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Granted: 2002-04-23
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Expires: 2020-06-30
Abstract
Abstract There is disclosed a method of manufacturing a semiconductor device ion by which an epitaxial growth film into which boron is doped in-situ is formed before a gate oxide film is formed after formation a well region for forming a MOS device and using it as a channel threshold voltage control layer, thus forming a counter-doped boron layer having an uniform and still higher concentration than the threshold voltage control layer formed by the conventional ion implantation process at the surface of the silicon substrate. As a result, it can make a device having a more sharp profile of the threshold voltage profile at the channel and having an improved short channel characteristic by the combination of the channel and junction engineering.
Inventors
- 👤 Jung Ho Lee
- 👤 Seung Chul Lee
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 14:24
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/027; H10D30/0278; H10P; H10P10/00; H10D30/0275; H10D62/00; H10D62/10; H10D62/17; H10D62/213; H10D62/221; H10D62/235; H10D62/314
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
182 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a device separation film on a silicon substrate and then forming an N-well region for forming a PMOS device; forming a first selective epitaxial growth film into which boron is doped on said silicon substrate to thereby control a threshold voltage of a channel; sequentially forming a gate oxide film, a gate electrode and a mask oxide film on the entire structure and then patterning selected regions of said mask oxide film, said gate electrode and said gate oxide film to obtain a gate region; forming a oxide film and a nitride film on the entire structure and then forming a double spacer made of a oxide film spacer and a nitride film spacer at the sidewalls of the patterned structure by blanket etching process; forming a second selective epitaxial growth film on said exposed silicon substrate; and performing ion implantation process for said first and second selective epitaxial growth film and then diffusing dopant into said silicon substrate by annealing process, thus forming an elevated source and drain region.
Claim 2
Independent Claim
182 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a device separation film on a silicon substrate and then forming an N-well region for forming a PMOS device; forming a first selective epitaxial growth film into which boron is doped on said silicon substrate to thereby control a threshold voltage of a channel; sequentially forming a gate oxide film, a gate electrode and a mask oxide film on the entire structure and then patterning selected regions of said mask oxide film, said gate electrode and said gate oxide film to obtain a gate region; forming a oxide film and a nitride film on the entire structure and then forming a double spacer made of a oxide film spacer and a nitride film spacer at the sidewalls of the patterned structure by blanket etching process; forming a second selective epitaxial growth film on said exposed silicon substrate; and performing ion implantation process for said first and second selective epitaxial growth film and then diffusing dopant into said silicon substrate by annealing process, thus forming an elevated source and drain region.
Claim 3
Dependent Claim
57 words
The method of manufacturing a semiconductor device according to claim 1 , wherein said N-well region is formed by implanting phosphorus of 1×10 13 through 3×10 13 ions/cm 2 at the energy of 800 through 1200 keV, and then annealing them at the temperature of 900 through 1000° C. for 25 through 35 minutes using a furnace.
Claim 4
Dependent Claim
34 words
The method of manufacturing a semiconductor device according to claim 1 , wherein said first selective epitaxial growth film into which boron is doped, is formed by a low pressure chemical vapor deposition method.
Claim 5
Dependent Claim
27 words
The method of manufacturing a semiconductor device according to claim 1 , wherein said first selective epitaxial growth film into which boron is doped, is formed in-situ.
Claim 6
Dependent Claim
32 words
The method of manufacturing a semiconductor device according to claim 1 , said first selective epitaxial growth film into which boron is doped, is formed in thickness of 100 through 200 Angstrom.
Claim 7
Dependent Claim
38 words
The method of manufacturing a semiconductor device according to claim 1 , wherein said first selective epitaxial growth film into which boron is doped, is formed with doping concentration of 3×10 12 through 7×10 12 ions/cm 2 .
Claim 8
Dependent Claim
32 words
The method of manufacturing a semiconductor device according to claim 1 , wherein said first selective epitaxial growth film into which boron is doped, uses dichlorosilane and hydrochloric acid as deposition gases.
Claim 9
Dependent Claim
37 words
The method of manufacturing a semiconductor device according to claim 7 , wherein the flow amount of said dichlorosilane is 30 through 300 sccm and the flow amount of said hydrochloric acid is 30 through 200 sccm.
Claim 10
Dependent Claim
37 words
The method of manufacturing a semiconductor device according to claim 1 , wherein said first selective epitaxial growth film into which boron is doped, uses B 2 H 6 of 100 through 300 sccm as doping gas.
Claim 11
Dependent Claim
45 words
The method of manufacturing a semiconductor device according to claim 1 , wherein said first selective epitaxial growth film into which boron is doped, is formed under the conditions having the pressure of 5 through 50 Torr and the temperature of 750 through 950° C.
Claim 12
Dependent Claim
38 words
The method of manufacturing a semiconductor device according to claim 1 , wherein said oxide film is formed in thickness of 100 through 300 Angstrom, and said nitride film is formed in thickness of 200 through 500 Angstrom.
Claim 13
Dependent Claim
34 words
The method of manufacturing a semiconductor device according to claim 1 , wherein said second selective epitaxial growth film grown on said silicon substrate after forming said double spacer is an undoped silicon film.
Claim 14
Dependent Claim
28 words
The method of manufacturing a semiconductor device according to claim 12 , wherein said second selective epitaxial growth film is formed in thickness of 800 through 2000 Angstrom.
Claim 15
Dependent Claim
30 words
The method of manufacturing a semiconductor device according to claim 12 , wherein said second selective epitaxial growth film is formed in-situ using a low pressure chemical vapor deposition method.
Claim 16
Dependent Claim
30 words
The method of manufacturing a semiconductor device according to claim 12 , wherein said second selective epitaxial growth film is formed in-situ using dichlorosilane and hydrochloric acid as deposition gases.
Claim 17
Dependent Claim
37 words
The method of manufacturing a semiconductor device according to claim 15 , wherein the flow amount of said dichlorosilane is 30 through 300 sccm and the flow amount of said hydrochloric acid is 30 through 200 sccm.
Claim 18
Dependent Claim
40 words
The method of manufacturing a semiconductor device according to claim 12 , wherein said second selective epitaxial growth film is formed under the conditions having the pressure of 5 through 50 Torr and the temperature of 750 through 950° C.
Claim 19
Dependent Claim
48 words
The method of manufacturing a semiconductor device according to claim 1 , wherein the ion implantation process for forming said source and drain region employs the concentration of 1×10 15 through 5×10 15 ion/cm 2 at the energy of 10 through 60 keV using BF 2 as dopants.
Claim 20
Dependent Claim
52 words
The method of manufacturing a semiconductor device according to claim 1 , wherein, after forming said N-well region, further comprising performing a first cleaning process for removing a native oxide film grown on said silicon substrate, and a second cleaning process for said exposed entire surface after formation of said double spacer.
Claim 21
Dependent Claim
22 words
The method of manufacturing a semiconductor device according to claim 19 , wherein said first cleaning process is performed in-situ or ex-situ.
Claim 22
Dependent Claim
34 words
The method of manufacturing a semiconductor device according to claim 19 , wherein said first cleaning process is performed ex-situ using a RCA cleaning or a mixture of UV-O 3 cleaning and HF cleaning.
Claim 23
Dependent Claim
37 words
The method of manufacturing a semiconductor device according to claim 19 , wherein said first cleaning process is in-situ by performing a hydrogen bake at the temperature of 800 through 900° C. for 1 through 5 minutes.
Claim 24
Dependent Claim
22 words
The method of manufacturing a semiconductor device according to claim 19 , wherein said second cleaning process is performed in-situ or ex-situ.
Claim 25
Dependent Claim
34 words
The method of manufacturing a semiconductor device according to claim 19 , wherein said second cleaning process is performed ex-situ using a RCA cleaning or a mixture of UV-O 3 cleaning and HF cleaning.
Claim 26
Dependent Claim
37 words
The method of manufacturing a semiconductor device according to claim 19 , wherein said second cleaning process is in-situ by performing a hydrogen bake at the temperature of 800 through 900° C. for 1 through 5 minutes.
Claim 27
Independent Claim
164 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a device separation film on a silicon substrate and then forming an N-well region for forming a PMOS device; forming a first selective epitaxial growth film into which boron is doped on said silicon substrate; sequentially forming a gate oxide film, a gate electrode and a mask oxide film on the entire structure and then patterning selected regions of said mask oxide film, said gate electrode and said gate oxide film to obtain a gate region; forming an oxide film and a nitride film on the entire structure and then forming a double spacer made of an oxide film spacer and a nitride film spacer at the sidewalls of the patterned structure by blanket etching process; forming a second selective epitaxial growth film above the first selective growth film; and performing ion implantation process in said first and second selective epitaxial growth films to thereby form an elevated source and drain region.
Claim 28
Independent Claim
164 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a device separation film on a silicon substrate and then forming an N-well region for forming a PMOS device; forming a first selective epitaxial growth film into which boron is doped on said silicon substrate; sequentially forming a gate oxide film, a gate electrode and a mask oxide film on the entire structure and then patterning selected regions of said mask oxide film, said gate electrode and said gate oxide film to obtain a gate region; forming an oxide film and a nitride film on the entire structure and then forming a double spacer made of an oxide film spacer and a nitride film spacer at the sidewalls of the patterned structure by blanket etching process; forming a second selective epitaxial growth film above the first selective growth film; and performing ion implantation process in said first and second selective epitaxial growth films to thereby form an elevated source and drain region.
References Cited (Backward Citations)
JPS54158880A
Cited
US5032538A
Cited
US4738937A
Cited
US4728623A
Cited
US4918029A
Cited
US5435856A
Cited
US5322814A
Cited
US5744377A
Cited
US5004702A
Cited
JPH0237745A
Cited
US5030583A
Cited
JPH02260667A
Cited
US5378652A
Cited
US5045494A
Cited
US5272109A
Cited
US5599724A
Cited
US5633201A
Cited
US5322802A
Cited
US5432121A
Cited
US5627102A
Cited
US5508225A
Cited
US5962895A
Cited
US5494837A
Cited
US5567652A
Cited
JPH08236728A
Cited
JPH10107219A
Cited
US5804470A
Cited
US5773350A
Cited
US5843826A
Cited
JPH1197519A
Cited
US5902125A
Cited
US6261911B1
Cited
US6277677B1
Cited
US6281085B1
Cited
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