Patent US6228465B1 successfully refreshed from Google Patents.
US6228465B1
Expired / Lapsed
US
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Process for producing multilayer wiring boards
Assignee: Tokyo Ohka Kogyo Co Ltd
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Filing: 1999-03-22
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Granted: 2001-05-08
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Expires: 2019-03-22
Abstract
Abstract An improved process for producing a multilayer wiring board that has a plurality of conductor patterns and an interlevel dielectric layer on at least one surface of a substrate, with via holes or trench-like channels being provided at specified sites of said interlevel dielectric layer to establish an electrical interconnection between said conductor patterns, wherein prior to the provision of said via holes or trench-like channels, a coating having resistance to sandblasting is formed in a pattern over the interlevel dielectric layer and then sandblasting is performed to remove the interlevel dielectric layer in selected areas to form the via holes or trench-like channels and, thereafter, the coating having resistance to sandblasting is removed, followed by the provision of a conductive layer.
Inventors
- 👤 Yoshikazu Takiguchi
- 👤 Hiroyuki Obiya
- 👤 Toru Takahashi
- 👤 Taisuke Shiroyama
- 👤 Kenji Tazawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 20:55
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/0011; H05K3/0044; H10; H10W; H10W20/00; H10W20/01; H05K3/46; H05K3/4644; H05K2201/00; H05K2201/01; H05K2201/0137; H05K2201/0166; H05K2203/00; H05K2203/02; H05K2203/025; Y; Y10; Y10S; Y10S428/00; Y10S428/901; Y10T; Y10T428/00; Y10T428/24; Y10T428/24802; Y10T428/24917
Claims Analysis
Total Claims: 34
Claim 1
Independent Claim
118 words
A multilayer wiring board that has plurality of conductor patterns and an interlevel dielectric layer on at least one surface of a substrate, with via holes being provided at specified sites of said interlevel dielectric layer to establish an electrical interconnection between said conductor patterns, obtainable by a process wherein prior to provision of said via holes, a coating having resistance to sandblasting is formed in a pattern over the interlevel dielectric layer and then sandblasting is performed to remove the interlevel dielectric layer in selected areas to form the via holes, and thereafter, the coating having resistance to sandblasting is removed, followed by provision of a conductive layer to establish an electrical interconnection between said conductor patterns.
Claim 2
Dependent Claim
118 words
A multilayer wiring board that has plurality of conductor patterns and an interlevel dielectric layer on at least one surface of a substrate, with via holes being provided at specified sites of said interlevel dielectric layer to establish an electrical interconnection between said conductor patterns, obtainable by a process wherein prior to provision of said via holes, a coating having resistance to sandblasting is formed in a pattern over the interlevel dielectric layer and then sandblasting is performed to remove the interlevel dielectric layer in selected areas to form the via holes, and thereafter, the coating having resistance to sandblasting is removed, followed by provision of a conductive layer to establish an electrical interconnection between said conductor patterns.
Claim 3
Dependent Claim
45 words
The multilayer wiring board according to claim 1 , wherein the interlevel dielectric layer is formed by slightly curing a heat curable or photocurable electrically insulating layer, removing the slightly cured insulating layer in selected areas by sandblasting, and heat curing the remaining insulating layer.
Claim 4
Dependent Claim
22 words
The multilayer wiring board according to claim 1 , wherein the process further includes roughening the surface of the interlevel dielectric layer.
Claim 5
Dependent Claim
35 words
The multilayer wiring board according to claim 3 , wherein the coating having resistance to sandblasting is removed before the surface of the interlevel dielectric layer is roughened and then the conductive layer is provided.
Claim 6
Dependent Claim
34 words
The multilayer wiring board according to claim 3 , wherein the surface of the interlevel dielectric layer is roughened before the coating having resistance to sandblasting is formed in a pattern over said layer.
Claim 7
Dependent Claim
28 words
The multilayer wiring board according to claim 3 , wherein the surface of the interlevel dielectric layer is roughened to an average surface roughness (Ra) of 0.1-10 μm.
Claim 8
Dependent Claim
18 words
The multilayer wiring board according to claim 1 , wherein the conductive layer is provided by electroless plating.
Claim 9
Dependent Claim
18 words
The multilayer wiring board according to claim 1 , wherein the conductive layer is provided by direct electroplating.
Claim 10
Dependent Claim
22 words
The multilayer wiring board according to claim 1 , wherein the coating having resistance to sandblasting is made of a light-sensitive resin.
Claim 11
Dependent Claim
38 words
The multilayer wiring board according to claim 9 , wherein the coating having resistance to sandblasting is made of a light-sensitive resin containing a urethane(meth) acrylate oligomer, a water-soluble cellulosic resin, a photopolymerization initiator and a (meth)acrylate monomer.
Claim 12
Dependent Claim
21 words
The multilayer wiring board according to claim 1 , wherein a sulfur-containing organic compound is incorporated in the interlevel dielectric layer.
Claim 13
Dependent Claim
42 words
The multilayer wiring board according to claim 1 , wherein the interlevel dielectric layer is made of at least one member of the group consisting of an epoxy resin, a polyphenolic resin, a novolak resin, a polyamide resin and a polyimide resin.
Claim 14
Dependent Claim
27 words
The multilayered wiring board according to claim 1 , wherein the heat curable or photocurable electrically insulating layer is slightly cured at a temperature of 70-110° C.
Claim 15
Dependent Claim
44 words
The multilayered wiring board according to claim 2 , wherein the slightly cured electrically insulating layer is converted to the interlevel dielectric layer either by exposure to light or by heat curing at a temperature excessing 110° C. but not higher than 200° C.
Claim 16
Dependent Claim
125 words
A multilayer wiring board that has a plurality of conductor patterns and an interlevel dielectric layer on at least one surface of a substrate, with trench-like channels being provided at specified sites of said interlevel dielectric layer to establish an electrical interconnection between said conductor patterns, obtainable by a process wherein prior to provision of said trench-like channels, a coating having resistance to sandblasting is formed in a pattern over the interlevel dielectric layer and then sandblasting is performed to remove the interlevel dielectric layer in selected areas to form the trench-like channels in an inwardly tapered cross-sectional shape and, thereafter, the coating having resistance to sandblasting is removed, followed by provision of a conductive layer to establish an electrical interconnection between said conductor patterns.
Claim 17
Dependent Claim
125 words
A multilayer wiring board that has a plurality of conductor patterns and an interlevel dielectric layer on at least one surface of a substrate, with trench-like channels being provided at specified sites of said interlevel dielectric layer to establish an electrical interconnection between said conductor patterns, obtainable by a process wherein prior to provision of said trench-like channels, a coating having resistance to sandblasting is formed in a pattern over the interlevel dielectric layer and then sandblasting is performed to remove the interlevel dielectric layer in selected areas to form the trench-like channels in an inwardly tapered cross-sectional shape and, thereafter, the coating having resistance to sandblasting is removed, followed by provision of a conductive layer to establish an electrical interconnection between said conductor patterns.
Claim 18
Dependent Claim
45 words
The multilayer wiring board according to claim 15 , wherein the interlevel dielectric layer is formed by slightly curing a heat curable or photocurable electrically insulating layer, removing the slightly cured insulating layer in selected areas by sandblasting, and heat curing the remaining insulating layer.
Claim 19
Dependent Claim
22 words
The multilayer wiring board according to claim 15 , wherein the process further includes roughening the surface of the interlevel dielectric layer.
Claim 20
Dependent Claim
35 words
The multilayer wiring board according to claim 17 , wherein the coating having resistance to sandblasting is removed before the surface of the interlevel dielectric layer is roughened and then the conductive layer is provided.
Claim 21
Dependent Claim
34 words
The multilayer wiring board according to claim 17 , wherein the surface of the interlevel dielectric layer is roughened before the coating having resistance to sandblasting is formed in a pattern over said layer.
Claim 22
Dependent Claim
28 words
The multilayer wiring board according to claim 17 , wherein the surface of the interlevel dielectric layer is roughened to an average surface roughness (Ra) of 0.1-10 μm.
Claim 23
Dependent Claim
18 words
The multilayer wiring board according to claim 15 , wherein the conductive layer is provided by electroless plating.
Claim 24
Dependent Claim
18 words
The multilayer wiring board according to claim 15 , wherein the conductive layer is provided by direct electroplating.
Claim 25
Dependent Claim
22 words
The multilayer wiring board according to claim 15 , wherein the coating having resistance to sandblasting is made of a light-sensitive resin.
Claim 26
Dependent Claim
38 words
The multilayer wiring board according to claim 23 , wherein the coating having resistance to sandblasting is made of a light-sensitive resin containing a urethane (meth)acrylate oligomer, a water-soluble cellulosic resin, a photopolymerization initiator and a (meth)acrylate monomer.
Claim 27
Dependent Claim
21 words
The multilayer wiring board according to claim 15 , wherein a sulfur-containing organic compound is incorporated in the interlevel dielectric layer.
Claim 28
Dependent Claim
42 words
The multilayer wiring board according to claim 15 , wherein the interlevel dielectric layer is made of at least one member of the group consisting of an epoxy resin, a polyphenolic resin, a novolak resin, a polyamide resin and a polyimide resin.
Claim 29
Dependent Claim
27 words
The multilayer wiring board according to claim 15 , wherein the heat curable or photocurable electrically insulating layer is slightly cured at a temperature of 70-110° C.
Claim 30
Dependent Claim
44 words
The multilayer wiring board according to claim 17 , wherein the slightly cured electrically insulating layer is converted to the interlevel dielectric layer either by exposure to light or by heat curing at a temperature excessing 110° C. but not higher than 200° C.
Claim 31
Dependent Claim
20 words
The multilayer wiring board according to claim 9 , wherein the light sensitive resin is applied as a dry film.
Claim 32
Dependent Claim
20 words
The multilayer wiring board according to claim 10 , wherein the light sensitive resin is applied as a dry film.
Claim 33
Dependent Claim
20 words
The multilayer wiring board according to claim 23 , wherein the light sensitive resin is applied as a dry film.
Claim 34
Dependent Claim
20 words
The multilayer wiring board according to claim 24 , wherein the light sensitive resin is applied as a dry film.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-05-07 | 2004-11-06 | 2005-05-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-05-07 | 2008-11-06 | 2009-05-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-05-07 | 2012-11-06 | 2013-05-08 | $7700.00 | Window Closed / Lapsed |