Patent US6181144B1 successfully refreshed from Google Patents.
US6181144B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor probe card having resistance measuring circuitry and method fabrication
Assignee: Micron Technology Inc
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Filing: 1998-02-25
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Granted: 2001-01-30
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Expires: 2018-02-25
Abstract
Abstract A probe card for testing semiconductor wafers, and a method for fabricating the probe card are provided. The probe card is adapted for use with a wafer probe handler, and a tester containing test circuitry. The probe card includes a substrate, and patterns of probe contacts formed on the substrate. Several different embodiments for the probe contacts are provided, including: etched projections covered with a conductive layer, microbumps formed on an electrically insulating polymer layer, indentations covered with conductive layers, and microbumps deposited in openings in an elastomeric mask layer. Some of the probe contacts are arranged in a four point Kelvin structure, adapted to measure a contact resistance between the probe contacts, and mating contacts on the wafer.
Inventors
- 👤 David R. Hembree
- 👤 Salman Akram
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 20:20
CPC Classifications
G; G01; G01R; G01R1/00; G01R1/02; G01R1/06; G01R1/067; G01R1/06711; G01R1/06733; G01R1/06744; G01R1/073; G01R1/07307; G01R1/07314; G01R1/07364; G01R27/00; G01R27/02; G01R27/14; G01R3/00
Claims Analysis
Total Claims: 24
Claim 1
Independent Claim
112 words
A probe card for testing a semiconductor wafer having a plurality of wafer contacts comprising: a substrate; a plurality of probe contacts on the substrate configured to electrically engage the wafer contacts; the probe contacts including a first resistivity contact configured to electrically engage a first wafer contact and a second resistivity contact configured to electrically engage a second wafer contact which is electrically connected to the first wafer contact; a plurality of conductors on the substrate in electrical communication with the first resistivity contact and the second resistivity contact and configured for use with a resistivity measuring circuit for evaluating a contact resistance between the probe contacts and the wafer contacts.
Claim 2
Dependent Claim
112 words
A probe card for testing a semiconductor wafer having a plurality of wafer contacts comprising: a substrate; a plurality of probe contacts on the substrate configured to electrically engage the wafer contacts; the probe contacts including a first resistivity contact configured to electrically engage a first wafer contact and a second resistivity contact configured to electrically engage a second wafer contact which is electrically connected to the first wafer contact; a plurality of conductors on the substrate in electrical communication with the first resistivity contact and the second resistivity contact and configured for use with a resistivity measuring circuit for evaluating a contact resistance between the probe contacts and the wafer contacts.
Claim 3
Dependent Claim
15 words
The probe card of claim 1 wherein the conductors comprise a four point Kelvin structure.
Claim 4
Dependent Claim
20 words
The probe card of claim 1 wherein the first wafer contact and the second wafer contact comprise interconnected power pads.
Claim 5
Dependent Claim
52 words
The probe card of claim 1 wherein the probe contacts comprise an element selected from the group consisting of projections on the substrate at least partially covered with first conductive layers, microbumps on a polymer film on the substrate, and indentations in the substrate at least partially covered with second conductive layers.
Claim 6
Dependent Claim
69 words
A probe card for testing a semiconductor wafer comprising: a substrate; a pair of probe contacts on the substrate configured to electrically engage a pair of interconnected wafer contacts on the wafer; and four conductors on the substrate in electrical communication with the probe contacts and configured as a Kelvin structure adapted to evaluate a contact resistance between the pair of probe contacts and the pair of wafer contacts.
Claim 7
Dependent Claim
69 words
A probe card for testing a semiconductor wafer comprising: a substrate; a pair of probe contacts on the substrate configured to electrically engage a pair of interconnected wafer contacts on the wafer; and four conductors on the substrate in electrical communication with the probe contacts and configured as a Kelvin structure adapted to evaluate a contact resistance between the pair of probe contacts and the pair of wafer contacts.
Claim 8
Dependent Claim
26 words
The probe card of claim 5 wherein the four conductors comprise two sense leads and two source leads configured for use with a resistivity measuring circuit.
Claim 9
Dependent Claim
17 words
The probe card of claim 5 wherein the pair of wafer contacts comprise electrically connected power contacts.
Claim 10
Dependent Claim
144 words
A probe card for testing a semiconductor wafer having a first wafer contact electrically connected to a second wafer contact comprising: a substrate; a first resistivity contact on the substrate for electrically engaaing the first wafer contact and a second resistivity contact on the substrate for electrically engaging the second wafer contact; a source high conductor and a sense high conductor on the substrate in electrical communication with the first resistivity contact; and a source low conductor and a sense low conductor on the substrate in electrical communication with the second resistivity contact; the source high conductor, the source low conductor, the sense high conductor, and the sense low conductor configured for use with a resistivity measuring circuit to evaluate a contact resistance between the first resistivity contact and the first wafer contact or between the second resistivity contact and the second wafer contact.
Claim 11
Dependent Claim
144 words
A probe card for testing a semiconductor wafer having a first wafer contact electrically connected to a second wafer contact comprising: a substrate; a first resistivity contact on the substrate for electrically engaaing the first wafer contact and a second resistivity contact on the substrate for electrically engaging the second wafer contact; a source high conductor and a sense high conductor on the substrate in electrical communication with the first resistivity contact; and a source low conductor and a sense low conductor on the substrate in electrical communication with the second resistivity contact; the source high conductor, the source low conductor, the sense high conductor, and the sense low conductor configured for use with a resistivity measuring circuit to evaluate a contact resistance between the first resistivity contact and the first wafer contact or between the second resistivity contact and the second wafer contact.
Claim 12
Dependent Claim
19 words
The probe card of claim 8 wherein the first wafer contact and the second wafer contact comprise power contacts.
Claim 13
Dependent Claim
22 words
The probe card of claim 8 wherein the first resistivity contact and the second resistivity contact comprise penetrating projections on the substrate.
Claim 14
Dependent Claim
26 words
The probe card of claim 8 wherein the first resistivity contact and the second resistivity contact comprise microbumps on a polymer film attached to the substrate.
Claim 15
Dependent Claim
28 words
The probe card of claim 8 wherein the first resistivity contact and the second resistivity contact comprise indentations in the substrate at least partially covered with conductive layers.
Claim 16
Dependent Claim
28 words
The probe card of claim 8 wherein the first resistivity contact and the second resistivity contact comprise microbumps in openings of an elastomeric mask layer on the substrate.
Claim 17
Dependent Claim
69 words
A probe card for testing a semiconductor wafer having two interconnected wafer contacts comprising: a substrate; two probe contacts on the substrate configured to electrically engage the two wafer contacts; and four conductors on the substrate in electrical communication with the two probe contacts and configured for electrical communication with a resistivity measuring circuit for evaluating a contact resistance between the two probe contacts and the two wafer contacts.
Claim 18
Dependent Claim
69 words
A probe card for testing a semiconductor wafer having two interconnected wafer contacts comprising: a substrate; two probe contacts on the substrate configured to electrically engage the two wafer contacts; and four conductors on the substrate in electrical communication with the two probe contacts and configured for electrical communication with a resistivity measuring circuit for evaluating a contact resistance between the two probe contacts and the two wafer contacts.
Claim 19
Dependent Claim
14 words
The probe card of claim 14 wherein the two wafer contacts comprise power contacts.
Claim 20
Dependent Claim
22 words
The probe card of claim 14 wherein each probe contact comprises a penetrating projection at least partially covered with a conductive layer.
Claim 21
Dependent Claim
17 words
The probe card of claim 14 wherein each probe contact comprises a microbump on a polymer film.
Claim 22
Dependent Claim
29 words
The probe card of claim 14 wherein the two wafer contacts comprise bumps and the two probe contacts comprise indentations covered with conductive layers configured to retain the bumps.
Claim 23
Dependent Claim
23 words
The probe card of claim 14 wherein the two probe contacts comprise microbumps in openings of an elastomeric mask layer on the substrate.
Claim 24
Dependent Claim
20 words
The probe card of claim 14 wherein the conductors and the two probe contacts comprise a four point Kelvin structure.
References Cited (Backward Citations)
US3809625A
Cited
US4027935A
Cited
US4161692A
Cited
US4585991A
Cited
US4906920A
Cited
US5042148A
Cited
US5172050A
Cited
US5686317A
Cited
US5678301A
Cited
US5225037A
Cited
US5264787A
Cited
US5177439A
Cited
US5180977A
Cited
US5565767A
Cited
US5483741A
Cited
US5712571A
Cited
US5962921A
Cited
US5917329A
Cited
US5926029A
Cited
US5915977A
Cited
US5931685A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-01-30 | 2004-07-31 | 2005-01-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-01-30 | 2008-07-31 | 2009-01-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-01-30 | 2012-07-31 | 2013-01-30 | $7700.00 | Window Closed / Lapsed |