Patent US6159842A successfully refreshed from Google Patents.
US6159842A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for fabricating a hybrid low-dielectric-constant intermetal dielectric (IMD) layer with improved reliability for multilevel interconnections
Assignee: Taiwan Semiconductor Manufacturing Co TSMC Ltd
•
Filing: 1999-01-11
•
Granted: 2000-12-12
•
Expires: 2019-01-11
Abstract
Abstract A method for fabricating a hybrid low dielectric constant intermetal dielectric layer with improved reliability for multilevel electrical interconnections on integrated circuits is achieved. After forming metal lines for interconnecting the semiconductor devices, a protective insulating layer composed of a low-k fluorine-doped oxide (k=3.5) is deposited. A porous low-k spin-on dielectric layer (k less than 3) is formed in the gaps between the metal lines to further minimize the intralevel capacitance. A more dense low-k dielectric layer, such as FSG, is deposited on the porous layer to provide improved structural mechanical strength and over the metal lines to provide reduced intralevel capacitance. Via holes are etched in the FSG and are filled with metal plugs and the method can be repeated for additional metal levels to complete the multilevel interconnections on the integrated circuit.
Inventors
- 👤 Weng Chang
- 👤 Yao-Yi Cheng
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 13:20
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/072; H10W20/074; H10W20/077; H10W20/093; H10W20/096; H10W20/40; H10W20/45; H10W20/46; H10W20/48; H10W20/495
Claims Analysis
Total Claims: 29
Claim 1
Independent Claim
186 words
A method for fabricating a hybrid low-dielectric constant (low-k) intermetal dielectric (IMD) layer for multilevel metal interconnections comprising the steps of: providing a semiconductor substrate having semiconductor devices and an insulating layer thereon; depositing a conductive layer on said insulating layer; patterning said conductive layer to form electrical interconnecting lines to contact said devices; depositing a conformal insulating layer as a protective layer over said patterned conductive layer; depositing a porous first low-k material over said insulating layer to provide a material with minimum dielectric constant between said interconnecting lines; etching back said porous first low-k material to said conformal insulating layer on said interconnecting lines, and leaving portions of said porous first low-k material in spaces between said interconnecting lines to minimize intralevel capacitance; plasma treating said porous first low-k material to densify the surface; depositing a denser second low-k material over said electrical interconnecting lines and said porous first low-k material to form a cap layer that protects said porous first low-k material and to minimize interlevel capacitance and to complete said hybrid low-dielectric constant intermetal dielectric (IMD) layer for said multilevel metal interconnections.
Claim 2
Independent Claim
186 words
A method for fabricating a hybrid low-dielectric constant (low-k) intermetal dielectric (IMD) layer for multilevel metal interconnections comprising the steps of: providing a semiconductor substrate having semiconductor devices and an insulating layer thereon; depositing a conductive layer on said insulating layer; patterning said conductive layer to form electrical interconnecting lines to contact said devices; depositing a conformal insulating layer as a protective layer over said patterned conductive layer; depositing a porous first low-k material over said insulating layer to provide a material with minimum dielectric constant between said interconnecting lines; etching back said porous first low-k material to said conformal insulating layer on said interconnecting lines, and leaving portions of said porous first low-k material in spaces between said interconnecting lines to minimize intralevel capacitance; plasma treating said porous first low-k material to densify the surface; depositing a denser second low-k material over said electrical interconnecting lines and said porous first low-k material to form a cap layer that protects said porous first low-k material and to minimize interlevel capacitance and to complete said hybrid low-dielectric constant intermetal dielectric (IMD) layer for said multilevel metal interconnections.
Claim 3
Dependent Claim
23 words
The method of claim 1, wherein said conductive layer is aluminum/copper alloy having a titanium/titanium nitride barrier layer on upper and lower surfaces.
Claim 4
Dependent Claim
21 words
The method of claim 2, wherein said aluminum/copper alloy is deposited to a thickness of between about 3000 and 10000 Angstroms.
Claim 5
Dependent Claim
35 words
The method of claim 1, wherein said conformal insulating layer is a fluorine-doped silicon glass (FSG) deposited by plasma-enhanced chemical vapor deposition, and is deposited to a thickness of between about 300 and 2000 Angstroms.
Claim 6
Dependent Claim
32 words
The method of claim 1, wherein said conformal insulating layer is silicon oxide deposited by plasma-enhanced chemical vapor deposition, and is deposited to a thickness of between about 200 and 2000 Angstroms.
Claim 7
Dependent Claim
20 words
The method of claim 1, wherein said porous first low-k material is a spin-on dielectric composed of hydrogen silsesquioxane (HSQ).
Claim 8
Dependent Claim
36 words
The method of claim 6, wherein said hydrogen silsesquioxane is cured by rapid thermal anneal (RTA) at a temperature of between about 350 and 500° C. for a time of between about 0.5 and 30 minutes.
Claim 9
Dependent Claim
30 words
The method of claim 1, wherein said denser second low-k material is a fluorine-doped silicon glass (FSG) and is deposited to a thickness of between about 3000 and 30000 Angstroms.
Claim 10
Dependent Claim
16 words
The method of claim 1, wherein said plasma treatment is carried out in an argon plasma.
Claim 11
Independent Claim
204 words
A method for fabricating a hybrid low-dielectric constant (low-k) intermetal dielectric (IMD) layer for multilevel metal interconnections comprising the steps of: providing a semiconductor substrate having semiconductor devices and an insulating layer thereon; depositing a conductive layer on said insulating layer; patterning said conductive layer to form electrical interconnecting lines to contact said devices; depositing a conformal insulating layer composed of fluorine-doped silicon glass (FSG) to form a protective layer over said patterned conductive layer; depositing a porous first low-k material composed of hydrogen silsesquioxane (HSQ) over said insulating layer to provide a material with minimum dielectric constant between said interconnecting lines; etching back said porous first low-k material to said conformal insulating layer on said interconnecting lines, and leaving portions of said porous first low-k material in spaces between said interconnecting lines to minimize intralevel capacitance; plasma treating said porous first low-k material to densify the surface; depositing a denser second low-k material composed of fluorine-doped silicon glass (FSG) over said electrical interconnecting lines and said porous first low-k material to form a cap layer that protects said porous first low-k material and to minimize interlevel capacitance and to complete said hybrid low-dielectric constant intermetal dielectric (IMD) layer for said multilevel metal interconnections.
Claim 12
Independent Claim
204 words
A method for fabricating a hybrid low-dielectric constant (low-k) intermetal dielectric (IMD) layer for multilevel metal interconnections comprising the steps of: providing a semiconductor substrate having semiconductor devices and an insulating layer thereon; depositing a conductive layer on said insulating layer; patterning said conductive layer to form electrical interconnecting lines to contact said devices; depositing a conformal insulating layer composed of fluorine-doped silicon glass (FSG) to form a protective layer over said patterned conductive layer; depositing a porous first low-k material composed of hydrogen silsesquioxane (HSQ) over said insulating layer to provide a material with minimum dielectric constant between said interconnecting lines; etching back said porous first low-k material to said conformal insulating layer on said interconnecting lines, and leaving portions of said porous first low-k material in spaces between said interconnecting lines to minimize intralevel capacitance; plasma treating said porous first low-k material to densify the surface; depositing a denser second low-k material composed of fluorine-doped silicon glass (FSG) over said electrical interconnecting lines and said porous first low-k material to form a cap layer that protects said porous first low-k material and to minimize interlevel capacitance and to complete said hybrid low-dielectric constant intermetal dielectric (IMD) layer for said multilevel metal interconnections.
Claim 13
Dependent Claim
23 words
The method of claim 10, wherein said conductive layer is aluminum/copper alloy having a titanium/titanium nitride barrier layer on upper and lower surfaces.
Claim 14
Dependent Claim
21 words
The method of claim 11, wherein said aluminum/copper alloy is deposited to a thickness of between about 3000 and 10000 Angstroms.
Claim 15
Dependent Claim
27 words
The method of claim 10, wherein said conformal insulating layer is deposited by plasma-enhanced chemical vapor deposition to a thickness of between about 200 and 2000 Angstroms.
Claim 16
Dependent Claim
36 words
The method of claim 10, wherein said hydrogen silsesquioxane is cured by rapid thermal anneal (RTA) at a temperature of between about 350 and 500° C. for a time of between about 0.5 and 30 minutes.
Claim 17
Dependent Claim
23 words
The method of claim 10, wherein said denser second low-k material is deposited to a thickness of between about 3000 and 30000 Angstroms.
Claim 18
Dependent Claim
16 words
The method of claim 10, wherein said plasma treatment is carried out in an argon plasma.
Claim 19
Independent Claim
232 words
A method for fabricating a hybrid low-dielectric constant (low-k) intermetal dielectric (IMD) layer for multilevel metal interconnections comprising the steps of: a) providing a semiconductor substrate having semiconductor devices and an insulating layer thereon; b) depositing a conductive layer on said insulating layer; c) patterning said conductive layer to form electrical interconnecting lines to contact said devices; d) depositing a conformal insulating layer as a protective layer over said patterned conductive layer; e) depositing a porous first low-k material over said insulating layer to provide a material with minimum dielectric constant between said interconnecting lines; f) etching back said porous first low-k material to said conformal insulating layer on said interconnecting lines, and leaving portions of said porous first low-k material in spaces between said interconnecting lines to minimize intralevel capacitance; g) plasma treating said porous first low-k material to densify the surface; h) depositing a denser second low-k material over said electrical interconnecting lines and said porous first low-k material to form a cap layer that protects said porous first low-k material and to minimize interlevel capacitance; i) forming contact holes in said second low-k material to said electrical interconnecting lines and forming metal plugs in said contact holes; j) performing steps b) through i) n times, wherein n is the number of metal levels necessary to complete said multilevel metal interconnections having said hybrid low-dielectric constant intermetal dielectric (IMD) layer.
Claim 20
Independent Claim
232 words
A method for fabricating a hybrid low-dielectric constant (low-k) intermetal dielectric (IMD) layer for multilevel metal interconnections comprising the steps of: a) providing a semiconductor substrate having semiconductor devices and an insulating layer thereon; b) depositing a conductive layer on said insulating layer; c) patterning said conductive layer to form electrical interconnecting lines to contact said devices; d) depositing a conformal insulating layer as a protective layer over said patterned conductive layer; e) depositing a porous first low-k material over said insulating layer to provide a material with minimum dielectric constant between said interconnecting lines; f) etching back said porous first low-k material to said conformal insulating layer on said interconnecting lines, and leaving portions of said porous first low-k material in spaces between said interconnecting lines to minimize intralevel capacitance; g) plasma treating said porous first low-k material to densify the surface; h) depositing a denser second low-k material over said electrical interconnecting lines and said porous first low-k material to form a cap layer that protects said porous first low-k material and to minimize interlevel capacitance; i) forming contact holes in said second low-k material to said electrical interconnecting lines and forming metal plugs in said contact holes; j) performing steps b) through i) n times, wherein n is the number of metal levels necessary to complete said multilevel metal interconnections having said hybrid low-dielectric constant intermetal dielectric (IMD) layer.
Claim 21
Dependent Claim
23 words
The method of claim 17, wherein said conductive layer is aluminum/copper alloy having a titanium/titanium nitride barrier layer on upper and lower surfaces.
Claim 22
Dependent Claim
21 words
The method of claim 18, wherein said aluminum/copper alloy is deposited to a thickness of between about 3000 and 10000 Angstroms.
Claim 23
Dependent Claim
35 words
The method of claim 17, wherein said conformal insulating layer is a fluorine-doped silicon glass (FSG) deposited by plasma-enhanced chemical vapor deposition, and is deposited to a thickness of between about 300 and 2000 Angstroms.
Claim 24
Dependent Claim
32 words
The method of claim 17, wherein said conformal insulating layer is silicon oxide deposited by plasma-enhanced chemical vapor deposition, and is deposited to a thickness of between about 200 and 2000 Angstroms.
Claim 25
Dependent Claim
20 words
The method of claim 17, wherein said porous first low-k material is a spin-on dielectric composed of hydrogen silsesquioxane (HSQ).
Claim 26
Dependent Claim
36 words
The method of claim 22, wherein said hydrogen silsesquioxane is cured by rapid thermal anneal (RTA) at a temperature of between about 350 and 500° C. for a time of between about 0.5 and 30 minutes.
Claim 27
Dependent Claim
30 words
The method of claim 17, wherein said denser second low-k material is a fluorine-doped silicon glass (FSG) and is deposited to a thickness of between about 3000 and 30000 Angstroms.
Claim 28
Dependent Claim
11 words
The method of claim 17, wherein said metal plugs are tungsten.
Claim 29
Dependent Claim
16 words
The method of claim 17, wherein said plasma treatment is carried out in an argon plasma.
References Cited (Backward Citations)
US5235195A
Cited
US5461003A
Cited
US5668398A
Cited
US5476817A
Cited
US5510293A
Cited
US5472913A
Cited
US5607773A
Cited
US6051491A
Cited
US5937324A
Cited
US5759906A
Cited
US5801092A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-12-12 | 2004-06-12 | 2004-12-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-12-12 | 2008-06-12 | 2008-12-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-12-12 | 2012-06-12 | 2012-12-12 | $7700.00 | Window Closed / Lapsed |