US6080529A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of etching patterned layers useful as masking during subsequent etching or for damascene structures
Assignee: Applied Materials Inc
•
Filing: 1998-10-19
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Granted: 2000-06-27
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Expires: 2018-10-19
Abstract
Abstract A first embodiment of the present invention pertains to a method of patterning a semiconductor device conductive feature while permitting easy removal of any residual masking layer which remains after completion of the etching process. A multi-layered masking structure is used which includes a layer of high-temperature organic-based masking material overlaid by either a patterned layer of inorganic masking material or by a layer of patterned high-temperature imageable organic masking material. The inorganic masking material is used to transfer a pattern to the high-temperature organic-based masking material and is then removed. The high-temperature organic-based masking material is used to transfer the pattern and then may be removed if desired. This method is also useful in the pattern etching of aluminum, even though aluminum can be etched at lower temperatures. A second embodiment of the present invention pertains to a specialized etch chemistry useful in the patterning of organic polymeric layers such as low k dielectrics, or other organic polymeric interfacial layers. This etch chemistry is useful for mask opening during the etch of a conductive layer or is useful in etching damascene structures where a metal fill layer is applied over the surface of a patterned organic-based dielectric layer. The etch chemistry provides for the use of etchant plasma species which minimize oxygen, fluorine, chlorine, and bromine content.
Inventors
- 👤 Yan Ye
- 👤 Pavel Ionov
- 👤 Allen Zhao
- 👤 Peter Chang-Lin Hsieh
- 👤 Diana Xiaobing Ma
- 👤 Chun Yan
- 👤 Jie Yuan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 01:19
CPC Classifications
H; H10; H10P; H10P50/00; H10P50/73; H10P50/20; H10P50/28; H10P50/286; H10P50/287; H10P50/71; H10P76/00; H10P76/20; H10P76/204; H10P76/2041; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/081; H10W20/084; H10P14/00; H10P14/60; H10P14/68; H10P14/683; H10P14/687; H10P14/69; H10P14/6902; H10P14/692; H10P14/6921; H10P14/69215; H10P50/26; H10P50/264; H10P50/266; H10P50/267; H10P50/282; H10P50/283
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
98 words
A method for patterning semiconductor device features comprising the steps of: (a) transferring a pattern from a patterned photoresist layer through a layer of high-temperature inorganic masking material; (b) transferring the pattern from a multi-layered structure remaining after step (a) through an underlying layer of a high-temperature organic-based masking material; (c) removing any photoresist material which remains after step (b); and (d) transferring the pattern from the multi-layered structure present after step (c) through at least one metal-comprising feature layer underlying said high-temperature organic-based masking material, wherein at least one layer of said metal-comprising feature layers comprises platinum.
Claim 2
Independent Claim
98 words
A method for patterning semiconductor device features comprising the steps of: (a) transferring a pattern from a patterned photoresist layer through a layer of high-temperature inorganic masking material; (b) transferring the pattern from a multi-layered structure remaining after step (a) through an underlying layer of a high-temperature organic-based masking material; (c) removing any photoresist material which remains after step (b); and (d) transferring the pattern from the multi-layered structure present after step (c) through at least one metal-comprising feature layer underlying said high-temperature organic-based masking material, wherein at least one layer of said metal-comprising feature layers comprises platinum.
Claim 3
Dependent Claim
17 words
The method of claim 1, wherein said high-temperature organic-based masking layer is a low k dielectric material.
Claim 4
Dependent Claim
36 words
The method of claim 2, wherein said low k dielectric material is selected from the group consisting of Poly(arylene)ethers, Poly(arylene)ether oxazoles, Parylene-N, Polyimides, Polynaphthalene-N, Polyphenyl-Quinoxalines, Polybenzoxazoles, Polyindane, Polynorborene, Polystyrene, Polyphenyleneoxide, Polyethylene, Polypropylene, αC and combinations thereof.
Claim 5
Independent Claim
139 words
A method for patterning semiconductor device features comprising the steps of: (a) transferring a pattern from a patterned photoresist layer through a layer of high-temperature inorganic masking material; (b) transferring the pattern from a multi-layered structure remaining after step (a) through an underlying layer of a high-temperature organic-based masking material; (c) removing any photoresist material which remains after step (b); and (d) transferring the pattern from the multi-layered structure present after step (c) through at least one metal-comprising feature layer underlying said high-temperature organic-based masking material, wherein said at least one metal-comprising feature layer comprises a metal selected from the group consisting of copper, platinum, silver, gold, iridium, rubidium, ruthenium, tungsten, and barium strontium titanate, and, wherein said at least one metal-comprising feature layer is etched using a combination of enhanced physical bombardment with a chemically reactive ion component.
Claim 6
Independent Claim
139 words
A method for patterning semiconductor device features comprising the steps of: (a) transferring a pattern from a patterned photoresist layer through a layer of high-temperature inorganic masking material; (b) transferring the pattern from a multi-layered structure remaining after step (a) through an underlying layer of a high-temperature organic-based masking material; (c) removing any photoresist material which remains after step (b); and (d) transferring the pattern from the multi-layered structure present after step (c) through at least one metal-comprising feature layer underlying said high-temperature organic-based masking material, wherein said at least one metal-comprising feature layer comprises a metal selected from the group consisting of copper, platinum, silver, gold, iridium, rubidium, ruthenium, tungsten, and barium strontium titanate, and, wherein said at least one metal-comprising feature layer is etched using a combination of enhanced physical bombardment with a chemically reactive ion component.
Claim 7
Dependent Claim
15 words
The method of claim 4, wherein said at least one metal-comprising feature layer comprises platinum.
Claim 8
Independent Claim
99 words
A method for patterning semiconductor device features comprising the steps of: (a) transferring a pattern from a patterned photoresist layer through a layer of high-temperature inorganic masking material; (b) transferring the pattern from a multi-layered structure remaining after step (a) through an underlying layer of a high-temperature organic-based masking material; (c) removing any photoresist material which remains after step (b); and (d) transferring the pattern from the multi-layered structure present after step (c) through at least one metal-comprising feature layer underlying said high-temperature organic-based masking material, wherein at least one layer of said metal comprising feature layers comprises aluminum.
Claim 9
Independent Claim
99 words
A method for patterning semiconductor device features comprising the steps of: (a) transferring a pattern from a patterned photoresist layer through a layer of high-temperature inorganic masking material; (b) transferring the pattern from a multi-layered structure remaining after step (a) through an underlying layer of a high-temperature organic-based masking material; (c) removing any photoresist material which remains after step (b); and (d) transferring the pattern from the multi-layered structure present after step (c) through at least one metal-comprising feature layer underlying said high-temperature organic-based masking material, wherein at least one layer of said metal comprising feature layers comprises aluminum.
Claim 10
Independent Claim
165 words
A method for patterning semiconductor device features comprising the steps of: (a) developing an imaged layer of high-temperature imageable material into a pattern using a plasma etching technique, to produce a patterned mask which can be used to transfer a desired pattern through underlying layers; (b) transferring the pattern formed in step a) through an underlying layer of high-temperature organic-based masking material; (c) transferring the pattern from the multi-layered structure present after step (b) through at least one metal-comprising feature layer underlying said high-temperature organic-based masking material; (d) removing residual high-temperature organic-based masking layer material from a surface of said feature layer; and (e) applying a planarizing layer of an organic-based material having a dielectric constant which is advantageous for purposes of increasing the gate speed of a transistor, wherein said organic-based material having an advantageous dielectric layer comprises a material selected from the group consisting of Poly(arylene)ethers, Poly(arylene)ether oxazoles, Parylene-N, Polyimides, Polynaphthalene-N, Polyphenyl-Quinoxalines, Polybenzoxazoles, Polyindane, Polynorborene, Polystyrene, Polyphenyleneoxide, Polyethylene, Polypropylene, αC, and combinations thereof.
Claim 11
Independent Claim
165 words
A method for patterning semiconductor device features comprising the steps of: (a) developing an imaged layer of high-temperature imageable material into a pattern using a plasma etching technique, to produce a patterned mask which can be used to transfer a desired pattern through underlying layers; (b) transferring the pattern formed in step a) through an underlying layer of high-temperature organic-based masking material; (c) transferring the pattern from the multi-layered structure present after step (b) through at least one metal-comprising feature layer underlying said high-temperature organic-based masking material; (d) removing residual high-temperature organic-based masking layer material from a surface of said feature layer; and (e) applying a planarizing layer of an organic-based material having a dielectric constant which is advantageous for purposes of increasing the gate speed of a transistor, wherein said organic-based material having an advantageous dielectric layer comprises a material selected from the group consisting of Poly(arylene)ethers, Poly(arylene)ether oxazoles, Parylene-N, Polyimides, Polynaphthalene-N, Polyphenyl-Quinoxalines, Polybenzoxazoles, Polyindane, Polynorborene, Polystyrene, Polyphenyleneoxide, Polyethylene, Polypropylene, αC, and combinations thereof.
Claim 12
Independent Claim
97 words
A method for patterning semiconductor device features comprising the steps of: (a) developing an imaged layer of high-temperature imageable material into a pattern using a plasma etching technique, to produce a patterned mask which can be used to transfer a desired pattern through underlying layers; (b) transferring the pattern formed in step a) through an underlying layer of high-temperature organic-based masking material; and (c) transferring the pattern from the multi-layered structure present after step (b) through at least one metal-comprising feature layer underlying said high-temperature organic-based masking material, wherein at least one metal-comprising feature layer comprises platinum.
Claim 13
Independent Claim
97 words
A method for patterning semiconductor device features comprising the steps of: (a) developing an imaged layer of high-temperature imageable material into a pattern using a plasma etching technique, to produce a patterned mask which can be used to transfer a desired pattern through underlying layers; (b) transferring the pattern formed in step a) through an underlying layer of high-temperature organic-based masking material; and (c) transferring the pattern from the multi-layered structure present after step (b) through at least one metal-comprising feature layer underlying said high-temperature organic-based masking material, wherein at least one metal-comprising feature layer comprises platinum.
Claim 14
Independent Claim
96 words
A method for patterning semiconductor features comprising the steps of: (a) developing an imaged layer of high-temperature imageable material into a pattern using a plasma etching technique, to produce a patterned mask which can be used to transfer a desired pattern through underlying layers; (b) transferring the pattern formed in step a) through an underlying layer of high-temperature organic-based masking material; and (c) transferring the pattern from the multi-layered structure present after step (b) through at least one metal-comprising feature layer underlying said high-temperature organic-based masking material, wherein at least one metal-comprising feature layer comprises aluminum.
Claim 15
Independent Claim
96 words
A method for patterning semiconductor features comprising the steps of: (a) developing an imaged layer of high-temperature imageable material into a pattern using a plasma etching technique, to produce a patterned mask which can be used to transfer a desired pattern through underlying layers; (b) transferring the pattern formed in step a) through an underlying layer of high-temperature organic-based masking material; and (c) transferring the pattern from the multi-layered structure present after step (b) through at least one metal-comprising feature layer underlying said high-temperature organic-based masking material, wherein at least one metal-comprising feature layer comprises aluminum.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2003-06-27 | 2003-12-27 | 2004-06-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-06-27 | 2007-12-27 | 2008-06-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-06-27 | 2011-12-27 | 2012-06-27 | $7700.00 | Window Closed / Lapsed |