Use of depolymerizable polymers in the fabrication of lift-off structure for multilevel metal processes

Claim 1

A process for forming a metal pattern on a substrate which comprises: forming a mask of at least one thermally depolymerizable polymer on the substrate with a pattern of openings complementary to the desired metal pattern; blanket coating the substrate and the mask with a metal; heating to thermally depolymerize the thermally depolymerizable polymer; and thereafter immersing the resulting assembly in a solvent to lift-off the depolymerized polymer and any metal thereover leaving metal in the desired pattern on the substrate.

Claim 12

A method for depositing a metallic conductive film on a substrate, comprising: (A) depositing over said substrate a blanket layer of a depolymerizable polymer; (B) lithographically forming, from said polymer, a layer depolymerizable mask having a pattern of openings to expose corresponding portions of said substrate; (C) coating a blanket layer of a conductive metallization over said mask and said exposed portions of said substrate; (D) thermally depolymerizing said mask; and (E) removing said depolymerized mask and the metallization thereon.

Claim 13

A method for depositing a metallic conductive film on a substrate, comprising: (A) depositing over said substrate a blanket layer of a depolymerizable polymer; (B) lithographically forming, from said polymer, a layer depolymerizable mask having a pattern of openings to expose corresponding portions of said substrate; (C) coating a blanket layer of a conductive metallization over said mask and said exposed portions of said substrate; (D) thermally depolymerizing said mask; and (E) removing said depolymerized mask and the metallization thereon.

Claim 19

A method of forming superposed levels of metallurgy in the fabrication of an integrated circuit package comprised of a substrate having an interconnective conductive pattern on a surface thereof which constitutes the following steps in the following sequence: (A) forming a first layer of an electrically insulating polymer on said surface (B) coating said first layer with a reactive ion resistant second layer of plasma deposited organosilicon divinyl selected from the group of tetramethyl disoloxane and hexamethyl disilazane, Si 3 N 4 and SiO x (C) coating said second layer with a third layer of a thermally depolymerizable polymer that upon a brief thermal treatment for 1-10 minutes at a temperature of about 290° to about 320° C. undergoes degradation that allows it to be selectively soluble in a solvent system to which the first said polymer is inert (D) coating said third layer with a fourth layer resistant to reactive ion etching in an oxygen ambient (E) forming a fifth layer of a resist mask over the fourth layer and defining at least one via opening to extend to a portion of the said conductive pattern (F) reactive ion etching in CF 4 ambient portions of said fourth layer at said via opening (G) reactive ion etching in an oxygen ambient portions of said third layer at said via opening (H) reactive ion etching in an ambient selected from the group of CF 4 , CHF 3 , or mixture of CF 4 and O 2 , the exposed portions of said second layer at said via opening (I) reactive ion etching in an O 2 ambient the exposed portion of first layer in said via opening to etch said portion of said conductive pattern with a subsequent clean up for 30 seconds using O 2 /CF 4 mixture (J) blanket coating said substrate inclusive of said via opening with a conductive metal sixth layer, having thickness close to the said first layer (K) heating said substrate to 5-15 minutes at 290°-320° C. in a nitrogen ambient and exposing said substrate to a solvent selected from the group of diglyme and diglyme n-methyl pyrrolidone (1:1) at 60° in an etcher to cause removal of the third layer and all overlying layers thereon (L) sequentially coating the said passivation reactive ion etch stop second layer with seventh, eighth and ninth and tenth layers respectively corresponding to the composition of said first, second, third and fourth layers (M) forming a second resist mask eleventh layer having openings corresponding to desired metallurgy patterns to be deposited on said passivation etch stop second layer, said opening encompassing said via connector and adjacent discrete areas of said passivation etch stop second layer of plasma deposited organosilicon selected from the group of silicon nitride, and SiO x (N) reactive ion etching in an ambient of CF 4 the exposed portions of said tenth layer in the openings of said second resist mask eleventh layer (O) sequentially reactive ion etching in O 2 ambient said ninth layer in O 2 +CF 4 ambient the said eighth layer and in O 2 ambient said seventh layer in the openings of said second resist mask (eleventh layer) to expose said via connector and adjacent portions of said second layer (P) blanket coating a twelveth layer of a conductive metal over said substrate inclusive of said via connector and said adjacent exposed portion of said passivating cum etch stop second layer (Q) heating said substrate in nitrogen ambient of about 290° to about 320° C. for time in the range of about 5 to about 15 minutes and exposing to a solvent selected from the group of diglyme or diglyme-n-methylpyrrolidone (1:1) at 60° C. in a bath carrying macronatics jet etcher and accomplishing a lift off in 1-10 minutes of all the layers above said eighth passivation etch stop layer, thereby providing second level of metallurgy.

Claim 20

A method of forming superposed levels of metallurgy in the fabrication of an integrated circuit package comprised of a substrate having an interconnective conductive pattern on a surface thereof which constitutes the following steps in the following sequence: (A) forming a first layer of an electrically insulating polymer on said surface (B) coating said first layer with a reactive ion resistant second layer of plasma deposited organosilicon divinyl selected from the group of tetramethyl disoloxane and hexamethyl disilazane, Si 3 N 4 and SiO x (C) coating said second layer with a third layer of a thermally depolymerizable polymer that upon a brief thermal treatment for 1-10 minutes at a temperature of about 290° to about 320° C. undergoes degradation that allows it to be selectively soluble in a solvent system to which the first said polymer is inert (D) coating said third layer with a fourth layer resistant to reactive ion etching in an oxygen ambient (E) forming a fifth layer of a resist mask over the fourth layer and defining at least one via opening to extend to a portion of the said conductive pattern (F) reactive ion etching in CF 4 ambient portions of said fourth layer at said via opening (G) reactive ion etching in an oxygen ambient portions of said third layer at said via opening (H) reactive ion etching in an ambient selected from the group of CF 4 , CHF 3 , or mixture of CF 4 and O 2 , the exposed portions of said second layer at said via opening (I) reactive ion etching in an O 2 ambient the exposed portion of first layer in said via opening to etch said portion of said conductive pattern with a subsequent clean up for 30 seconds using O 2 /CF 4 mixture (J) blanket coating said substrate inclusive of said via opening with a conductive metal sixth layer, having thickness close to the said first layer (K) heating said substrate to 5-15 minutes at 290°-320° C. in a nitrogen ambient and exposing said substrate to a solvent selected from the group of diglyme and diglyme n-methyl pyrrolidone (1:1) at 60° in an etcher to cause removal of the third layer and all overlying layers thereon (L) sequentially coating the said passivation reactive ion etch stop second layer with seventh, eighth and ninth and tenth layers respectively corresponding to the composition of said first, second, third and fourth layers (M) forming a second resist mask eleventh layer having openings corresponding to desired metallurgy patterns to be deposited on said passivation etch stop second layer, said opening encompassing said via connector and adjacent discrete areas of said passivation etch stop second layer of plasma deposited organosilicon selected from the group of silicon nitride, and SiO x (N) reactive ion etching in an ambient of CF 4 the exposed portions of said tenth layer in the openings of said second resist mask eleventh layer (O) sequentially reactive ion etching in O 2 ambient said ninth layer in O 2 +CF 4 ambient the said eighth layer and in O 2 ambient said seventh layer in the openings of said second resist mask (eleventh layer) to expose said via connector and adjacent portions of said second layer (P) blanket coating a twelveth layer of a conductive metal over said substrate inclusive of said via connector and said adjacent exposed portion of said passivating cum etch stop second layer (Q) heating said substrate in nitrogen ambient of about 290° to about 320° C. for time in the range of about 5 to about 15 minutes and exposing to a solvent selected from the group of diglyme or diglyme-n-methylpyrrolidone (1:1) at 60° C. in a bath carrying macronatics jet etcher and accomplishing a lift off in 1-10 minutes of all the layers above said eighth passivation etch stop layer, thereby providing second level of metallurgy.