Patent EP0123562B1 successfully refreshed from Google Patents.
US4440804A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Lift-off process for fabricating self-aligned contacts
Assignee: National Semiconductor Corp
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Filing: 1982-08-02
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Granted: 1984-04-03
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Expires: 2002-08-02
Abstract
Abstract A process is provided for fabricating self-aligned contacts to the surface of an integrated circuit. The process includes the steps of depositing a layer of silicon dioxide 12 on the surface of a semiconductor structure 10; depositing a layer of polyimide 15 on the surface of the silicon dioxide 12; defining openings 23 in the polyimide material 15 and the silicon dioxide 12 to thereby expose regions of the semiconductor structure 10; and depositing metal 22 across the underlying surface and in the openings 23. In the preferred embodiment metal 22 is substantially the same thickness as silicon dioxide 12, and polyimide material 15 is masked using sequentially deposited layers of silicon dioxide 18 and photoresist 21.
Inventors
- 👤 Alvin Milgram
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 06:55
CPC Classifications
H; H10; H10P; H10P76/00; H10P76/20; H10P76/202; Y; Y10; Y10S; Y10S438/00; Y10S438/942; Y10S438/948; Y10S438/951
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
122 words
A lift-off process for fabricating self-aligned regions of first and second material on the surface of semiconductor structure comprising; depositing a layer of first material on the surface of the semiconductor; depositing a layer of a polyamide on the layer of first material; depositing at least one layer of masking material on the polyimide; defining openings to the surface of the semiconductor structure through the at least one layer of masking material, the layer of polyimide, and the layer of first material, including the step of isotropically etching substantially only the polyimide in the openings; depositing second material on the semiconductor structure and on the at least one layer of masking material; and removing the polyimide and the second material deposited thereon.
Claim 2
Dependent Claim
122 words
A lift-off process for fabricating self-aligned regions of first and second material on the surface of semiconductor structure comprising; depositing a layer of first material on the surface of the semiconductor; depositing a layer of a polyamide on the layer of first material; depositing at least one layer of masking material on the polyimide; defining openings to the surface of the semiconductor structure through the at least one layer of masking material, the layer of polyimide, and the layer of first material, including the step of isotropically etching substantially only the polyimide in the openings; depositing second material on the semiconductor structure and on the at least one layer of masking material; and removing the polyimide and the second material deposited thereon.
Claim 3
Dependent Claim
22 words
A process as in claim 1 wherein the first material comprises electrically insulating material and the second material comprises electrically conductive material.
Claim 4
Dependent Claim
18 words
A process as in claim 2 wherein the at least one layer of masking material comprises silicon dioxide.
Claim 5
Dependent Claim
18 words
A process as in claim 3 wherein the at least one layer of masking material further comprises photoresist.
Claim 6
Dependent Claim
21 words
A process as in claim 2 wherein the electrically conductive material comprises aluminum and the electrically insulating material comprises silicon dioxide.
Claim 7
Dependent Claim
19 words
A process as in claim 1 wherein the semiconductor structure comprises silicon and the first material comprises silicon dioxide.
Claim 8
Dependent Claim
21 words
A process as in claim 6 further comprising the step of etching the edges of the silicon dioxide in the openings.
Claim 9
Dependent Claim
26 words
A process as in claim 7 wherein the step of depositing the second material comprises raising the semiconductor structure to a temperature of approximately 325° C.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-04-03 | 1987-10-03 | 1988-04-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-04-03 | 1991-10-03 | 1992-04-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-04-03 | 1995-10-03 | 1996-04-03 | $7700.00 | Window Closed / Lapsed |