Patent US6074932A successfully refreshed from Google Patents.
US6074932A
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Method for forming a stress-free shallow trench isolation
Assignee: Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Filing: 1998-01-28
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Granted: 2000-06-13
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Expires: 2018-01-28
Abstract
Abstract The method for forming a trench isolation includes the steps as follows. At first, a first pad layer is formed over the semiconductor substrate and a stacked layer is formed over the first pad layer. An opening is then defined in the first pad layer and the stacked layer. A portion of the first pad layer is removed to have an undercut region under the stacked layer. A second pad layer is formed on an exposed portion of the semiconductor substrate under the opening and the undercut region. Then a buffer layer within the undercut region and a sidewall structure on the stacked layer are formed. A portion of the second pad layer uncovered by the sidewall structure is removed. A portion of the semiconductor substrate uncovered by the stacked layer and the second pad layer is then removed to form a trench. A first insulator layer is formed over the trench and within the undercut region. Thus a trench structure with a first insulator layer can be formed.
Inventors
- 👤 Shye-Lin Wu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 18:44
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/014; H10W10/10; H10W10/17
Claims Analysis
Total Claims: 25
Claim 1
Independent Claim
155 words
A method of forming a trench region in a semiconductor substrate, said method comprising the steps of: forming a first pad layer over said semiconductor substrate; forming a stacked layer over said first pad layer; defining an opening to said semiconductor substrate in said first pad layer and said stacked layer; removing a portion of said first pad layer to have an undercut region under said stacked layer around said opening; forming a second pad layer on an exposed portion of said semiconductor substrate under said opening and said undercut region; forming a buffer layer within said undercut region and a sidewall structure on said stacked layer; removing a portion of said second pad layer uncovered by said sidewall structure; removing a portion of said semiconductor substrate uncovered by said stacked layer and said second pad layer to form a trench; and forming a first insulator layer over said trench and within said undercut region.
Claim 2
Independent Claim
155 words
A method of forming a trench region in a semiconductor substrate, said method comprising the steps of: forming a first pad layer over said semiconductor substrate; forming a stacked layer over said first pad layer; defining an opening to said semiconductor substrate in said first pad layer and said stacked layer; removing a portion of said first pad layer to have an undercut region under said stacked layer around said opening; forming a second pad layer on an exposed portion of said semiconductor substrate under said opening and said undercut region; forming a buffer layer within said undercut region and a sidewall structure on said stacked layer; removing a portion of said second pad layer uncovered by said sidewall structure; removing a portion of said semiconductor substrate uncovered by said stacked layer and said second pad layer to form a trench; and forming a first insulator layer over said trench and within said undercut region.
Claim 3
Dependent Claim
61 words
The method of claim 1 and further comprising the steps of: forming a second insulator layer within said trench and over said stacked layer; performing a thermal process to concentrate said second insulator layer; removing a portion of said second insulator layer not located over said trench; and removing said stacked layer and said pad layer for forming a trench isolation.
Claim 4
Dependent Claim
18 words
The method of claim 2, wherein said second insulator layer comprises a chemical vapor deposited (CVD) oxide layer.
Claim 5
Dependent Claim
27 words
The method of claim 1, wherein said first pad layer comprises an oxide layer which is grown thermally from said semiconductor substrate in an oxygen containing ambient.
Claim 6
Dependent Claim
20 words
The method of claim 1, wherein said stacked layer comprises a nitride layer which is formed by chemical vapor deposition.
Claim 7
Dependent Claim
38 words
The method of claim 1, wherein said second pad layer comprises an oxide layer which is grown thermally from said semiconductor substrate in an oxygen containing ambient, with a thickness between about 10 angstroms to about 250 angstroms.
Claim 8
Dependent Claim
36 words
The method of claim 1, wherein said buffer layer and said sidewall structure are formed by depositing and etching back a silicon layer, which is deposited within said undercut region and conformably over said stacked layer.
Claim 9
Dependent Claim
24 words
The method of claim 7, wherein said silicon layer comprises a material which is selected from the group consisting of amorphous silicon and polysilicon.
Claim 10
Dependent Claim
31 words
The method of claim 1, wherein said first insulator layer comprises an oxide layer which is thermally grown from said semiconductor substrate and said buffer layer in an oxygen containing ambient.
Claim 11
Independent Claim
195 words
A method of forming a trench region in a semiconductor substrate, said method comprising the steps of: forming a first pad layer over said semiconductor substrate; forming a stacked layer over said first pad layer; defining an opening to said semiconductor substrate in said first pad layer and said stacked layer; removing a portion of said first pad layer to have an undercut region under said stacked layer around said opening; forming a second pad layer on an exposed portion of said semiconductor substrate under said opening and said undercut region; forming a buffer layer within said undercut region and a sidewall structure on said stacked layer, by depositing and etching back a silicon layer, which is deposited within said undercut region and conformably over said stacked layer; removing a portion of said second pad layer uncovered by said sidewall structure; removing a portion of said semiconductor substrate uncovered by said stacked layer and said second pad layer to form a trench; and forming a first insulator layer over said trench and within said undercut region, said first insulator layer being thermally grown from said semiconductor substrate and said buffer layer in an oxidization process.
Claim 12
Independent Claim
195 words
A method of forming a trench region in a semiconductor substrate, said method comprising the steps of: forming a first pad layer over said semiconductor substrate; forming a stacked layer over said first pad layer; defining an opening to said semiconductor substrate in said first pad layer and said stacked layer; removing a portion of said first pad layer to have an undercut region under said stacked layer around said opening; forming a second pad layer on an exposed portion of said semiconductor substrate under said opening and said undercut region; forming a buffer layer within said undercut region and a sidewall structure on said stacked layer, by depositing and etching back a silicon layer, which is deposited within said undercut region and conformably over said stacked layer; removing a portion of said second pad layer uncovered by said sidewall structure; removing a portion of said semiconductor substrate uncovered by said stacked layer and said second pad layer to form a trench; and forming a first insulator layer over said trench and within said undercut region, said first insulator layer being thermally grown from said semiconductor substrate and said buffer layer in an oxidization process.
Claim 13
Dependent Claim
61 words
The method of claim 10 and further comprising the steps of: forming a second insulator layer within said trench and over said stacked layer; performing a thermal process to concentrate said second insulator layer; removing a portion of said second insulator layer not located over said trench; and removing said stacked layer and said pad layer to form a trench isolation.
Claim 14
Dependent Claim
18 words
The method of claim 11, wherein said second insulator layer comprises a chemical vapor deposited (CVD) oxide layer.
Claim 15
Dependent Claim
27 words
The method of claim 10, wherein said first pad layer comprises an oxide layer which is grown thermally from said semiconductor substrate in an oxygen containing ambient.
Claim 16
Dependent Claim
20 words
The method of claim 10, wherein said stacked layer comprises a nitride layer which is formed by chemical vapor deposition.
Claim 17
Dependent Claim
38 words
The method of claim 10, wherein said second pad layer comprises an oxide layer which is grown thermally from said semiconductor substrate in an oxygen containing ambient, with a thickness between about 10 angstroms to about 250 angstroms.
Claim 18
Dependent Claim
24 words
The method of claim 10, wherein said silicon layer comprises a material which is selected from the group consisting of amorphous silicon and polysilicon.
Claim 19
Independent Claim
239 words
A method of forming a trench isolation in a semiconductor substrate, said method comprising the steps of: forming a first pad layer over said semiconductor substrate; forming a stacked layer over said first pad layer; defining an opening to said semiconductor substrate in said first pad layer and said stacked layer; removing a portion of said first pad layer to have an undercut region under said stacked layer around said opening; forming a second pad layer on an exposed portion of said semiconductor substrate under said opening and said undercut region; forming a buffer layer within said undercut region and a sidewall structure on said stacked layer, by depositing and etching back a silicon layer, which is deposited within said undercut region and conformably over said stacked layer; removing a portion of said second pad layer uncovered by said sidewall structure; removing a portion of said semiconductor substrate uncovered by said stacked layer and said second pad layer to form a trench; forming a first insulator layer over said trench and within said undercut region, said first insulator layer being thermally grown from said semiconductor substrate and said buffer layer in an oxidization process; forming a second insulator layer within said trench and over said stacked layer; performing a thermal process to concentrate said second insulator layer; removing a portion of said second insulator layer not located over said trench; and removing said stacked layer and said pad layer.
Claim 20
Independent Claim
239 words
A method of forming a trench isolation in a semiconductor substrate, said method comprising the steps of: forming a first pad layer over said semiconductor substrate; forming a stacked layer over said first pad layer; defining an opening to said semiconductor substrate in said first pad layer and said stacked layer; removing a portion of said first pad layer to have an undercut region under said stacked layer around said opening; forming a second pad layer on an exposed portion of said semiconductor substrate under said opening and said undercut region; forming a buffer layer within said undercut region and a sidewall structure on said stacked layer, by depositing and etching back a silicon layer, which is deposited within said undercut region and conformably over said stacked layer; removing a portion of said second pad layer uncovered by said sidewall structure; removing a portion of said semiconductor substrate uncovered by said stacked layer and said second pad layer to form a trench; forming a first insulator layer over said trench and within said undercut region, said first insulator layer being thermally grown from said semiconductor substrate and said buffer layer in an oxidization process; forming a second insulator layer within said trench and over said stacked layer; performing a thermal process to concentrate said second insulator layer; removing a portion of said second insulator layer not located over said trench; and removing said stacked layer and said pad layer.
Claim 21
Dependent Claim
18 words
The method of claim 17, wherein said second insulator layer comprises a chemical vapor deposited (CVD) oxide layer.
Claim 22
Dependent Claim
27 words
The method of claim 17, wherein said first pad layer comprises an oxide layer which is grown thermally from said semiconductor substrate in an oxygen containing ambient.
Claim 23
Dependent Claim
20 words
The method of claim 17, wherein said stacked layer comprises a nitride layer which is formed by chemical vapor deposition.
Claim 24
Dependent Claim
38 words
The method of claim 17, wherein said second pad layer comprises an oxide layer which is grown thermally from said semiconductor substrate in an oxygen containing ambient, with a thickness between about 10 angstroms to about 250 angstroms.
Claim 25
Dependent Claim
24 words
The method of claim 17, wherein said silicon layer comprises a material which is selected from the group consisting of amorphous silicon and polysilicon.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-06-13 | 2003-12-13 | 2004-06-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-06-13 | 2007-12-13 | 2008-06-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-06-13 | 2011-12-13 | 2012-06-13 | $7700.00 | Window Closed / Lapsed |