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US5976953A Expired / Lapsed US ⏱️ 0.0 years remaining

Three dimensional processor using transferred thin film circuits

Assignee: Callahan Cellular LLC
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Filing: 1997-12-08
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Granted: 1999-11-02
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Expires: 2017-12-08
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Abstract

Abstract A multi-layered structure is fabricated in which a microprocessor is configured in different layers and interconnected vertically through insulating layers which separate each circuit layer of the structure. Each circuit layer can be fabricated in a separate wafer or thin film material and then transferred onto the layered structure and interconnected.

Inventors

  • 👤 Paul M. Zavracky
  • 👤 Matthew Zavracky
  • 👤 Duy-Phach Vu
  • 👤 Brenda Dingle

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 11:13
CPC Classifications
H; H10; H10W; H10W90/00; H10W70/00; H10W70/099; H10W90/401; H10W72/00; H10W72/01; H10W90/20; H10W90/297; H10W90/701; H10W90/721; H10W90/722; Y; Y10; Y10S; Y10S148/00; Y10S148/164

Claims Analysis

Total Claims: 23
Claim 1
Independent Claim 114 words
A method of fabricating a data processor comprising: forming a first circuit of a data processor in a first layer of semiconductor material; forming a circuit routing layer and bonding the circuit routing layer to the first circuit layer; forming a second circuit of a data processor in a second layer of semiconductor material; bonding the second layer to the circuit routing layer with a bonding layer; and connecting the first data processor circuit with the second data processor circuit with interconnects extending through the bonding layer and along the circuit routing layer such that data processor control signals can be conducted from the first data processor circuit to the second data processor circuit.
Claim 2
Independent Claim 114 words
A method of fabricating a data processor comprising: forming a first circuit of a data processor in a first layer of semiconductor material; forming a circuit routing layer and bonding the circuit routing layer to the first circuit layer; forming a second circuit of a data processor in a second layer of semiconductor material; bonding the second layer to the circuit routing layer with a bonding layer; and connecting the first data processor circuit with the second data processor circuit with interconnects extending through the bonding layer and along the circuit routing layer such that data processor control signals can be conducted from the first data processor circuit to the second data processor circuit.
Claim 3
Dependent Claim 18 words
The method of claim 1 further comprising forming a controller in the first circuit or the second circuit.
Claim 4
Dependent Claim 18 words
The method of claim 1 further comprising forming a memory in the first circuit or the second circuit.
Claim 5
Dependent Claim 21 words
The method of claim 1 further comprising bonding the first circuit layer to the second circuit layer with a polymeric adhesive.
Claim 6
Dependent Claim 19 words
The method of claim 1 further comprising tiling a plurality of second circuit layers over the circuit routing layer.
Claim 7
Dependent Claim 13 words
The method of claim 1 wherein the semiconductor material comprises an SOI structure.
Claim 8
Dependent Claim 13 words
The method of claim 1 wherein the routing layer comprises a metallized layer.
Claim 9
Independent Claim 113 words
A method of fabricating a data processor comprising: forming a first circuit of a data processor in a silicon-on insulator structure; forming a circuit routing layer and bonding the circuit routing layer to the first circuit layer; forming a second circuit of a data processor in a second layer of a silicon material; bonding the second layer to the circuit routing layer with a bonding layer; and connecting the first data processor circuit with the second data processor circuit with interconnects extending through the bonding layer and along the circuit routing layer such that data processor control signals can be conducted from the first data processor circuit to the second data processor circuit.
Claim 10
Independent Claim 113 words
A method of fabricating a data processor comprising: forming a first circuit of a data processor in a silicon-on insulator structure; forming a circuit routing layer and bonding the circuit routing layer to the first circuit layer; forming a second circuit of a data processor in a second layer of a silicon material; bonding the second layer to the circuit routing layer with a bonding layer; and connecting the first data processor circuit with the second data processor circuit with interconnects extending through the bonding layer and along the circuit routing layer such that data processor control signals can be conducted from the first data processor circuit to the second data processor circuit.
Claim 11
Dependent Claim 18 words
The method of claim 8 further comprising forming a controller in the first circuit or the second circuit.
Claim 12
Dependent Claim 18 words
The method of claim 8 further comprising forming a memory in the first circuit or the second circuit.
Claim 13
Dependent Claim 21 words
The method of claim 8 further comprising bonding the first circuit layer to the second circuit layer with a polymeric adhesive.
Claim 14
Dependent Claim 19 words
The method of claim 8 further comprising tiling a plurality of second circuit layers over the circuit routing layer.
Claim 15
Dependent Claim 16 words
The method of claim 8 further comprising forming a metallized circuit layer on the routing layer.
Claim 16
Independent Claim 99 words
A method of fabricating a microprocessor comprising: forming a first circuit of a microprocessor in a first layer of silicon material; forming a second circuit layer and bonding the second circuit layer to the first circuit layer; forming a third circuit of a microprocessor in a third layer of silicon material; bonding the third layer to the second layer with a bonding layer; and connecting the first microprocessor circuit with the second processor circuit with interconnects extending through the bonding layer such that processor control signals can be conducted from the first processor circuit to the second processor circuit.
Claim 17
Independent Claim 99 words
A method of fabricating a microprocessor comprising: forming a first circuit of a microprocessor in a first layer of silicon material; forming a second circuit layer and bonding the second circuit layer to the first circuit layer; forming a third circuit of a microprocessor in a third layer of silicon material; bonding the third layer to the second layer with a bonding layer; and connecting the first microprocessor circuit with the second processor circuit with interconnects extending through the bonding layer such that processor control signals can be conducted from the first processor circuit to the second processor circuit.
Claim 18
Dependent Claim 18 words
The method of claim 14 further comprising forming a controller in the first circuit or the second circuit.
Claim 19
Dependent Claim 18 words
The method of claim 14 further comprising forming a memory in the first circuit or the second circuit.
Claim 20
Dependent Claim 21 words
The method of claim 14 further comprising bonding the first circuit layer to the second circuit layer with a polymeric adhesive.
Claim 21
Dependent Claim 19 words
The method of claim 14 further comprising tiling a plurality of second circuit layers over the circuit routing layer.
Claim 22
Dependent Claim 13 words
The method of claim 14 wherein the silicon layer comprises an SOI structure.
Claim 23
Dependent Claim 14 words
The method of claim 14 wherein the bonding layer comprises a thermal insulating adhesive.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-11-01 2003-05-03 2003-11-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-11-01 2007-05-03 2007-11-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-11-01 2011-05-03 2011-11-02 $7700.00 Window Closed / Lapsed

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