US5939788A
Expired / Lapsed
US
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Copper diffusion barrier, aluminum wetting layer and improved methods for filling openings in silicon substrates with cooper
Assignee: Micron Technology Inc
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Filing: 1998-03-11
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Granted: 1999-08-17
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Expires: 2018-03-11
Abstract
Abstract Improved methods for filling openings in silicon substrates with copper and the metal interconnects so produced are provided. One method involves the use of a Ti x Al y N z barrier layer which is stable to the high temperatures required to reflow copper after PVD deposition. Another method involves the use of an aluminum wetting layer between a barrier layer and the copper which effectively lowers the temperature at which copper reflows and therefore allows the use of typical barrier layers.
Inventors
- 👤 Allen McTeer
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 14:22
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/032; H10W20/047; H10W20/049; H10W20/033; H10W20/035; H10W20/048; H10W20/056; H10W20/059; H10W20/40; H10W20/41; H10W20/425
Claims Analysis
Total Claims: 101
Claim 1
Independent Claim
50 words
A method for filling openings in silicon substrates comprising: a) depositing a copper diffusion barrier layer on the inside surface of the opening; b) depositing an aluminum wetting layer over the copper diffusion barrier layer; and c) depositing a copper layer over the aluminum wetting layer to fill the opening.
Claim 2
Independent Claim
50 words
A method for filling openings in silicon substrates comprising: a) depositing a copper diffusion barrier layer on the inside surface of the opening; b) depositing an aluminum wetting layer over the copper diffusion barrier layer; and c) depositing a copper layer over the aluminum wetting layer to fill the opening.
Claim 3
Dependent Claim
57 words
A method according to claim 1 wherein the copper diffusion barrier is selected from the group consisting of Ti x Al y N z , TaN, TiN and WN wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof.
Claim 4
Independent Claim
75 words
A method for filling openings in silicon substrates comprising: a) depositing a Ti x Al y N z barrier layer on the inside surface of the opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof, and b) depositing a copper layer over the Ti x Al y N z barrier layer to fill the opening.
Claim 5
Independent Claim
75 words
A method for filling openings in silicon substrates comprising: a) depositing a Ti x Al y N z barrier layer on the inside surface of the opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof, and b) depositing a copper layer over the Ti x Al y N z barrier layer to fill the opening.
Claim 6
Dependent Claim
42 words
A method according to claim 3 further comprising the step of annealing the Ti x Al y N z barrier layer by subjecting the silicon substrate so formed in an O 2 atmosphere prior to the step of depositing the copper layer.
Claim 7
Dependent Claim
85 words
A process for forming a contact level dual damascene on a silicon substrate comprising: a) providing a first and second insulating layers on the silicon substrate having an opening through said first and second insulating layers; b) depositing a refractory metal layer on the inside surface of the opening; c) deposing a Ti x Al y N z barrier layer over the refractory metal layer; and d) depositing a copper layer of the Ti x Al y N z barrier layer to fill the opening.
Claim 8
Dependent Claim
85 words
A process for forming a contact level dual damascene on a silicon substrate comprising: a) providing a first and second insulating layers on the silicon substrate having an opening through said first and second insulating layers; b) depositing a refractory metal layer on the inside surface of the opening; c) deposing a Ti x Al y N z barrier layer over the refractory metal layer; and d) depositing a copper layer of the Ti x Al y N z barrier layer to fill the opening.
Claim 9
Dependent Claim
87 words
A process for forming a contact level dual damascene on a silicon substrate comprising: a) providing first and second insulating layers on the silicon substrate having an opening through said first and second insulating layers; b) depositing a refractory metal layer on the inside surface of the opening; c) depositing a copper diffusion barrier layer over the refractory metal layer; d) depositing an aluminum wetting layer over the copper diffusion barrier layer; and e) depositing a copper layer over the aluminum wetting layer to fill the opening.
Claim 10
Dependent Claim
87 words
A process for forming a contact level dual damascene on a silicon substrate comprising: a) providing first and second insulating layers on the silicon substrate having an opening through said first and second insulating layers; b) depositing a refractory metal layer on the inside surface of the opening; c) depositing a copper diffusion barrier layer over the refractory metal layer; d) depositing an aluminum wetting layer over the copper diffusion barrier layer; and e) depositing a copper layer over the aluminum wetting layer to fill the opening.
Claim 11
Dependent Claim
149 words
A process for forming an interconnect on a silicon substrate comprising: a) providing a first insulating layer on the silicon substrate having a conductive metal plug therein; b) depositing a second insulating layer over the first insulating layer and the conductive metal plug; c) patterning the second insulating layer to form a patterned second insulating layer having an opening wherein the opening lies over at least part of the conductive metal plug; d) depositing a copper diffusion barrier layer on the inside surface of the opening; e) depositing an aluminum wetting layer over the copper diffusion barrier layer; f) depositing a copper layer over the aluminum wetting layer to fill the opening and form said interconnect; g) annealing the copper layer by subjecting the silicon substrate so formed to an elevated temperature in a vacuum for a period of time less than 5 minutes; and h) reflowing the copper.
Claim 12
Dependent Claim
149 words
A process for forming an interconnect on a silicon substrate comprising: a) providing a first insulating layer on the silicon substrate having a conductive metal plug therein; b) depositing a second insulating layer over the first insulating layer and the conductive metal plug; c) patterning the second insulating layer to form a patterned second insulating layer having an opening wherein the opening lies over at least part of the conductive metal plug; d) depositing a copper diffusion barrier layer on the inside surface of the opening; e) depositing an aluminum wetting layer over the copper diffusion barrier layer; f) depositing a copper layer over the aluminum wetting layer to fill the opening and form said interconnect; g) annealing the copper layer by subjecting the silicon substrate so formed to an elevated temperature in a vacuum for a period of time less than 5 minutes; and h) reflowing the copper.
Claim 13
Dependent Claim
16 words
A process according to claim 7 wherein the annealing step is conducted in a gaseous atmosphere.
Claim 14
Dependent Claim
14 words
A process according to claim 8 wherein the gaseous atmosphere is a hydrogen atmosphere.
Claim 15
Dependent Claim
174 words
A process for forming an interconnect on a silicon substrate comprising: a) providing a first insulating layer on the silicon substrate having a conductive metal plug therein; b) depositing a second insulating layer over the first insulating layer and the conductive metal plug; c) patterning the second insulating layer to form a patterned second insulating layer having an opening wherein the opening lies over at least part of the conductive metal plug; d) depositing a Ti x Al y N z barrier layer on the inside surface of the opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; e) depositing a copper layer over the Ti x Al y N z barrier layer to fill the opening and form said interconnect; f) annealing the copper layer by subjecting the silicon substrate so formed to an elevated temperature in a vacuum for a period of time less than 5 minutes; and g) reflowing the copper.
Claim 16
Dependent Claim
174 words
A process for forming an interconnect on a silicon substrate comprising: a) providing a first insulating layer on the silicon substrate having a conductive metal plug therein; b) depositing a second insulating layer over the first insulating layer and the conductive metal plug; c) patterning the second insulating layer to form a patterned second insulating layer having an opening wherein the opening lies over at least part of the conductive metal plug; d) depositing a Ti x Al y N z barrier layer on the inside surface of the opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; e) depositing a copper layer over the Ti x Al y N z barrier layer to fill the opening and form said interconnect; f) annealing the copper layer by subjecting the silicon substrate so formed to an elevated temperature in a vacuum for a period of time less than 5 minutes; and g) reflowing the copper.
Claim 17
Dependent Claim
42 words
A process according to claim 10 further comprising the step of annealing the Ti x Al y N z barrier layer by subjecting the silicon substrate so formed in an O 2 atmosphere prior to the step of depositing the copper layer.
Claim 18
Dependent Claim
316 words
A process for forming a via level copper/copper dual damascene interconnect on a silicon substrate comprising: a) providing first insulating layer on the silicon substrate having a conductive metal plug therein; b) depositing a second insulating layer over the first insulating layer and the conductive metal plug; c) patterning the second insulating layer to form a patterned second insulating layer having a first opening wherein the first opening lies over at least part of the conductive metal plug; d) depositing a first Ti x Al y N z barrier layer on the inside surface of the first opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; e) depositing a first copper layer over the first Ti x Al y N z barrier layer to fill the first opening; f) planarizing the silicon substrate so formed; g) depositing a third insulating layer over the second insulating layer and the first copper layer; h) patterning the third insulating layer to form a patterned third insulating layer having a second opening wherein the second opening lies over at least part of the first copper layer; i) depositing a second Ti x Al y N z barrier layer on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; j) depositing a second copper layer over the second Ti x Al y N z layer to fill the second opening and form said via level copper/copper dual damascene interconnect; k) annealing the second copper layer by subjecting the silicon substrate so formed to an elevated temperature in a vacuum for a period of time less than 5 minutes; and l) reflowing the second copper layer.
Claim 19
Dependent Claim
316 words
A process for forming a via level copper/copper dual damascene interconnect on a silicon substrate comprising: a) providing first insulating layer on the silicon substrate having a conductive metal plug therein; b) depositing a second insulating layer over the first insulating layer and the conductive metal plug; c) patterning the second insulating layer to form a patterned second insulating layer having a first opening wherein the first opening lies over at least part of the conductive metal plug; d) depositing a first Ti x Al y N z barrier layer on the inside surface of the first opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; e) depositing a first copper layer over the first Ti x Al y N z barrier layer to fill the first opening; f) planarizing the silicon substrate so formed; g) depositing a third insulating layer over the second insulating layer and the first copper layer; h) patterning the third insulating layer to form a patterned third insulating layer having a second opening wherein the second opening lies over at least part of the first copper layer; i) depositing a second Ti x Al y N z barrier layer on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; j) depositing a second copper layer over the second Ti x Al y N z layer to fill the second opening and form said via level copper/copper dual damascene interconnect; k) annealing the second copper layer by subjecting the silicon substrate so formed to an elevated temperature in a vacuum for a period of time less than 5 minutes; and l) reflowing the second copper layer.
Claim 20
Dependent Claim
287 words
A process for forming a via level copper/copper dual damascene interconnect on a silicon substrate comprising: a) providing a first insulating layer on the silicon substrate having a conductive metal plug therein; b) depositing a second insulating layer over the first insulating layer and the conductive metal plug; c) patterning the second insulating layer to form a patterned second insulating layer having a first opening wherein the first opening lies over at least part of the conductive metal plug; d) depositing a copper diffusion barrier layer on the inside surface of the opening; e) depositing an aluminum wetting layer over the copper diffusion barrier layer; f) depositing a first copper layer over the aluminum wetting layer to fill the opening; g) planarizing the silicon substrate so formed; h) depositing a third insulating layer over the second insulating layer and the first copper layer; i) patterning the third insulating layer to form a patterned third insulating layer having a second opening wherein the second opening lies over at least part of the first copper layer; j) depositing a Ti x Al y N z barrier layer on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; k) depositing a second copper layer over the Ti x Al y N z barrier layer to fill the second opening and form said via level copper/copper dual damascene interconnect; l) annealing the second copper layer by subjecting the silicon substrate so formed to an elevated temperature in a vacuum for a period of time less than 5 minutes; and m) reflowing the second copper layer.
Claim 21
Dependent Claim
287 words
A process for forming a via level copper/copper dual damascene interconnect on a silicon substrate comprising: a) providing a first insulating layer on the silicon substrate having a conductive metal plug therein; b) depositing a second insulating layer over the first insulating layer and the conductive metal plug; c) patterning the second insulating layer to form a patterned second insulating layer having a first opening wherein the first opening lies over at least part of the conductive metal plug; d) depositing a copper diffusion barrier layer on the inside surface of the opening; e) depositing an aluminum wetting layer over the copper diffusion barrier layer; f) depositing a first copper layer over the aluminum wetting layer to fill the opening; g) planarizing the silicon substrate so formed; h) depositing a third insulating layer over the second insulating layer and the first copper layer; i) patterning the third insulating layer to form a patterned third insulating layer having a second opening wherein the second opening lies over at least part of the first copper layer; j) depositing a Ti x Al y N z barrier layer on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; k) depositing a second copper layer over the Ti x Al y N z barrier layer to fill the second opening and form said via level copper/copper dual damascene interconnect; l) annealing the second copper layer by subjecting the silicon substrate so formed to an elevated temperature in a vacuum for a period of time less than 5 minutes; and m) reflowing the second copper layer.
Claim 22
Dependent Claim
289 words
A process for forming a via level copper/copper dual damascene interconnect on a silicon substrate comprising: a) providing a first insulating layer on the silicon substrate having a conductive metal plug therein; b) depositing a second insulating layer over the first insulating layer and the conductive metal plug; c) patterning the second insulating layer to form a patterned second insulating layer having a first opening wherein the first opening lies over at least part of the conductive metal plug; d) depositing a Ti x Al y N z barrier layer on the inside surface of the first opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; e) depositing a first copper layer over the Ti x Al y N z barrier layer to fill the first opening; f) planarizing the silicon substrate so formed; g) depositing a third insulating layer over the second insulating layer and the first copper layer; h) patterning the third insulating layer to form a patterned third insulating layer having a second opening wherein the second opening lies over at least part of the first copper layer; i) depositing a copper diffusion barrier layer on the inside surface of the second opening; j) depositing an aluminum wetting layer over the copper diffusion barrier layer; k) depositing a second copper layer over the aluminum wetting layer to fill the second opening and form said via level copper/copper dual damascene interconnect; l) annealing the second copper layer by subjecting the silicon substrate so formed to an elevated temperature in a vacuum for a period of time less than 5 minutes; and n) reflowing the second copper layer.
Claim 23
Dependent Claim
289 words
A process for forming a via level copper/copper dual damascene interconnect on a silicon substrate comprising: a) providing a first insulating layer on the silicon substrate having a conductive metal plug therein; b) depositing a second insulating layer over the first insulating layer and the conductive metal plug; c) patterning the second insulating layer to form a patterned second insulating layer having a first opening wherein the first opening lies over at least part of the conductive metal plug; d) depositing a Ti x Al y N z barrier layer on the inside surface of the first opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; e) depositing a first copper layer over the Ti x Al y N z barrier layer to fill the first opening; f) planarizing the silicon substrate so formed; g) depositing a third insulating layer over the second insulating layer and the first copper layer; h) patterning the third insulating layer to form a patterned third insulating layer having a second opening wherein the second opening lies over at least part of the first copper layer; i) depositing a copper diffusion barrier layer on the inside surface of the second opening; j) depositing an aluminum wetting layer over the copper diffusion barrier layer; k) depositing a second copper layer over the aluminum wetting layer to fill the second opening and form said via level copper/copper dual damascene interconnect; l) annealing the second copper layer by subjecting the silicon substrate so formed to an elevated temperature in a vacuum for a period of time less than 5 minutes; and n) reflowing the second copper layer.
Claim 24
Dependent Claim
272 words
A process for forming a via level copper/copper dual damascene interconnect on a silicon substrate comprising: a) providing a first insulating layer on a silicon substrate having a conductive metal plug therein; b) depositing a second insulating layer over the first insulating layer and the conductive metal plug; c) patterning the second insulating layer to form a patterned second insulating layer having a first opening wherein the first opening lies over at least part of the conductive metal plug; d) depositing a first copper diffusion barrier layer on the inside surface of the first opening; e) depositing a first aluminum wetting layer over the first copper diffusion barrier layer; f) depositing a first copper layer over the first aluminum wetting layer to fill the first opening; g) planarizing the silicon substrate so formed; h) depositing a third insulating layer over the second insulating layer and the first copper layer; i) patterning the third insulating layer to form a patterned third insulating layer having a second opening wherein the second opening lies over at least part of the first copper layer; j) depositing a second copper diffusion barrier layer on the inside surface of the second opening; k) depositing a second aluminum wetting layer over the second copper diffusion barrier layer; l) depositing a second copper layer over the second aluminum wetting layer to fill the second opening and form said via level copper/copper dual damascene interconnect; m) annealing the second copper layer by subjecting the silicon substrate so formed to an elevated temperature in a vacuum for a period of time less than 5 minutes; and n) reflowing the second copper layer.
Claim 25
Dependent Claim
272 words
A process for forming a via level copper/copper dual damascene interconnect on a silicon substrate comprising: a) providing a first insulating layer on a silicon substrate having a conductive metal plug therein; b) depositing a second insulating layer over the first insulating layer and the conductive metal plug; c) patterning the second insulating layer to form a patterned second insulating layer having a first opening wherein the first opening lies over at least part of the conductive metal plug; d) depositing a first copper diffusion barrier layer on the inside surface of the first opening; e) depositing a first aluminum wetting layer over the first copper diffusion barrier layer; f) depositing a first copper layer over the first aluminum wetting layer to fill the first opening; g) planarizing the silicon substrate so formed; h) depositing a third insulating layer over the second insulating layer and the first copper layer; i) patterning the third insulating layer to form a patterned third insulating layer having a second opening wherein the second opening lies over at least part of the first copper layer; j) depositing a second copper diffusion barrier layer on the inside surface of the second opening; k) depositing a second aluminum wetting layer over the second copper diffusion barrier layer; l) depositing a second copper layer over the second aluminum wetting layer to fill the second opening and form said via level copper/copper dual damascene interconnect; m) annealing the second copper layer by subjecting the silicon substrate so formed to an elevated temperature in a vacuum for a period of time less than 5 minutes; and n) reflowing the second copper layer.
Claim 26
Dependent Claim
247 words
A process for forming a via level aluminum/copper dual damascene interconnect on a silicon substrate comprising: a) providing a first insulating layer on the silicon substrate having a conductive metal plug therein; b) depositing a second insulating layer over the first insulating layer and the conductive metal plug; c) patterning the second insulating layer to form a patterned second insulating layer having a first opening wherein the first opening lies over at least part of the conductive metal plug; d) depositing a wetting layer for aluminum on the inside surface of the first opening; e) depositing an aluminum layer over the wetting layer for aluminum to fill the first opening; f) planarizing the silicon substrate so formed; g) depositing a third insulating layer over the second insulating layer and the aluminum layer; h) patterning the third insulating layer to form a patterned third insulating layer having a second opening wherein the second opening lies over at least part of the aluminum layer; i) depositing a copper diffusion barrier layer on the inside surface of the second opening; j) depositing an aluminum wetting layer over the copper diffusion barrier layer; k) depositing a copper layer over the aluminum wetting layer to fill the second opening and form said via level aluminum/copper dual damascene interconnect; l) annealing the copper layer by subjecting the silicon substrate so formed to an elevated temperature in a vacuum for a period of time less than 5 minutes; and m) reflowing the copper layer.
Claim 27
Dependent Claim
247 words
A process for forming a via level aluminum/copper dual damascene interconnect on a silicon substrate comprising: a) providing a first insulating layer on the silicon substrate having a conductive metal plug therein; b) depositing a second insulating layer over the first insulating layer and the conductive metal plug; c) patterning the second insulating layer to form a patterned second insulating layer having a first opening wherein the first opening lies over at least part of the conductive metal plug; d) depositing a wetting layer for aluminum on the inside surface of the first opening; e) depositing an aluminum layer over the wetting layer for aluminum to fill the first opening; f) planarizing the silicon substrate so formed; g) depositing a third insulating layer over the second insulating layer and the aluminum layer; h) patterning the third insulating layer to form a patterned third insulating layer having a second opening wherein the second opening lies over at least part of the aluminum layer; i) depositing a copper diffusion barrier layer on the inside surface of the second opening; j) depositing an aluminum wetting layer over the copper diffusion barrier layer; k) depositing a copper layer over the aluminum wetting layer to fill the second opening and form said via level aluminum/copper dual damascene interconnect; l) annealing the copper layer by subjecting the silicon substrate so formed to an elevated temperature in a vacuum for a period of time less than 5 minutes; and m) reflowing the copper layer.
Claim 28
Dependent Claim
260 words
A process for forming a via level aluminum/copper dual damascene interconnect on a silicon substrate comprising: a) providing a first insulating layer on the silicon substrate having a conductive metal plug therein; b) depositing a second insulating layer over the first insulating layer and the conductive metal plug; c) patterning the second insulating layer to form a patterned second insulating layer having a first opening wherein the first opening lies over at least part of the conductive metal plug; d) depositing an aluminum diffusion barrier layer on the inside surface of the first opening; e) depositing a wetting layer for aluminum over the aluminum diffusion barrier layer; f) depositing an aluminum layer over the wetting layer for aluminum to fill the first opening; g) planarizing the silicon substrate so formed; h) depositing a third insulating layer over the second insulating layer and the aluminum layer; i) patterning the third insulating layer to form a patterned third insulating layer having a second opening wherein the second opening lies over at least part of the aluminum layer; j) depositing a copper diffusion barrier layer on the inside surface of the second opening; k) depositing an aluminum wetting layer over the copper diffusion barrier layer; l) depositing a copper layer over the aluminum wetting layer to fill the second opening and form said via level aluminum/copper dual damascene interconnect; m) annealing the copper layer by subjecting the silicon substrate so formed to an elevated temperature in a vacuum for a period of time less than 5 minutes; and n) reflowing the copper layer.
Claim 29
Dependent Claim
260 words
A process for forming a via level aluminum/copper dual damascene interconnect on a silicon substrate comprising: a) providing a first insulating layer on the silicon substrate having a conductive metal plug therein; b) depositing a second insulating layer over the first insulating layer and the conductive metal plug; c) patterning the second insulating layer to form a patterned second insulating layer having a first opening wherein the first opening lies over at least part of the conductive metal plug; d) depositing an aluminum diffusion barrier layer on the inside surface of the first opening; e) depositing a wetting layer for aluminum over the aluminum diffusion barrier layer; f) depositing an aluminum layer over the wetting layer for aluminum to fill the first opening; g) planarizing the silicon substrate so formed; h) depositing a third insulating layer over the second insulating layer and the aluminum layer; i) patterning the third insulating layer to form a patterned third insulating layer having a second opening wherein the second opening lies over at least part of the aluminum layer; j) depositing a copper diffusion barrier layer on the inside surface of the second opening; k) depositing an aluminum wetting layer over the copper diffusion barrier layer; l) depositing a copper layer over the aluminum wetting layer to fill the second opening and form said via level aluminum/copper dual damascene interconnect; m) annealing the copper layer by subjecting the silicon substrate so formed to an elevated temperature in a vacuum for a period of time less than 5 minutes; and n) reflowing the copper layer.
Claim 30
Dependent Claim
272 words
A process for forming a via level aluminum/copper dual damascene interconnect on a silicon substrate comprising: a) providing a first insulating layer on the silicon substrate having a conductive metal plug therein; b) depositing a second insulating layer over the first insulating layer and the conductive metal plug; c) patterning the second insulating layer to form a patterned second insulating layer having a first opening wherein the first opening lies over at least part of the conductive metal plug; d) depositing a wetting layer for aluminum on the inside surface of the first opening; e) depositing an aluminum layer over the wetting layer for aluminum to fill the first opening; f) planarizing the silicon substrate so formed; g) depositing a third insulating layer over the second insulating layer and the aluminum layer; h) patterning the third insulating layer to form a patterned third insulating layer having a second opening wherein the second opening lies over at least part of the aluminum layer; i) depositing a Ti x Al y N z barrier layer on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof, j) depositing a copper layer over the Ti x Al y N z barrier layer to fill the second opening and form said via level aluminum/copper dual damascene interconnect; k) annealing the copper layer by subjecting the silicon substrate so formed to an elevated temperature in a vacuum for a period of time less than 5 minutes; and l) reflowing the copper layer.
Claim 31
Dependent Claim
272 words
A process for forming a via level aluminum/copper dual damascene interconnect on a silicon substrate comprising: a) providing a first insulating layer on the silicon substrate having a conductive metal plug therein; b) depositing a second insulating layer over the first insulating layer and the conductive metal plug; c) patterning the second insulating layer to form a patterned second insulating layer having a first opening wherein the first opening lies over at least part of the conductive metal plug; d) depositing a wetting layer for aluminum on the inside surface of the first opening; e) depositing an aluminum layer over the wetting layer for aluminum to fill the first opening; f) planarizing the silicon substrate so formed; g) depositing a third insulating layer over the second insulating layer and the aluminum layer; h) patterning the third insulating layer to form a patterned third insulating layer having a second opening wherein the second opening lies over at least part of the aluminum layer; i) depositing a Ti x Al y N z barrier layer on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof, j) depositing a copper layer over the Ti x Al y N z barrier layer to fill the second opening and form said via level aluminum/copper dual damascene interconnect; k) annealing the copper layer by subjecting the silicon substrate so formed to an elevated temperature in a vacuum for a period of time less than 5 minutes; and l) reflowing the copper layer.
Claim 32
Dependent Claim
284 words
A process for forming a via level aluminum/copper dual damascene interconnect on a silicon substrate comprising: a) providing a first insulating layer on the silicon substrate having a conductive metal plug therein; b) depositing a second insulating layer over the first insulating layer and the conductive metal plug; c) patterning the second insulating layer to form a patterned second insulating layer having a first opening wherein the first opening lies over at least part of the conductive metal plug; d) depositing an aluminum diffusion barrier layer on the inside surface of the first opening; e) depositing a wetting layer for aluminum over the aluminum diffusion barrier layer; f) depositing an aluminum layer over the wetting layer for aluminum to fill the opening; g) planarizing the silicon substrate so formed; h) depositing a third insulating layer over the second insulating layer and the aluminum layer; i) patterning the third insulating layer to form a patterned third insulating layer having a second opening wherein the second opening lies over at least part of the aluminum layer; j) depositing a Ti x Al y N z barrier layer on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; k) depositing a copper layer over the Ti x Al y N z barrier layer to fill the second opening and form said via level aluminum/copper dual damascene interconnect; l) annealing the copper layer by subjecting the silicon substrate so formed to an elevated temperature in a vacuum for a period of time less than 5 minutes; and m) reflowing the copper layer.
Claim 33
Dependent Claim
284 words
A process for forming a via level aluminum/copper dual damascene interconnect on a silicon substrate comprising: a) providing a first insulating layer on the silicon substrate having a conductive metal plug therein; b) depositing a second insulating layer over the first insulating layer and the conductive metal plug; c) patterning the second insulating layer to form a patterned second insulating layer having a first opening wherein the first opening lies over at least part of the conductive metal plug; d) depositing an aluminum diffusion barrier layer on the inside surface of the first opening; e) depositing a wetting layer for aluminum over the aluminum diffusion barrier layer; f) depositing an aluminum layer over the wetting layer for aluminum to fill the opening; g) planarizing the silicon substrate so formed; h) depositing a third insulating layer over the second insulating layer and the aluminum layer; i) patterning the third insulating layer to form a patterned third insulating layer having a second opening wherein the second opening lies over at least part of the aluminum layer; j) depositing a Ti x Al y N z barrier layer on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; k) depositing a copper layer over the Ti x Al y N z barrier layer to fill the second opening and form said via level aluminum/copper dual damascene interconnect; l) annealing the copper layer by subjecting the silicon substrate so formed to an elevated temperature in a vacuum for a period of time less than 5 minutes; and m) reflowing the copper layer.
Claim 34
Dependent Claim
84 words
A silicon structure comprising: a) an insulating layer deposited over a silicon substrate and having an opening therein; b) a Ti x Al y N z barrier layer deposited on the inside surface of the opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof, and c) a copper layer deposited over the Ti x Al y N z barrier layer to fill the opening.
Claim 35
Dependent Claim
84 words
A silicon structure comprising: a) an insulating layer deposited over a silicon substrate and having an opening therein; b) a Ti x Al y N z barrier layer deposited on the inside surface of the opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof, and c) a copper layer deposited over the Ti x Al y N z barrier layer to fill the opening.
Claim 36
Dependent Claim
85 words
A silicon structure comprising: a) an insulating layer deposited over a silicon substrate and having an opening therein; b) a copper diffusion barrier layer deposited on the inside surface of the opening; c) an aluminum wetting layer deposited over the copper diffusion barrier layer; and d) a copper layer deposited over the aluminum wetting layer to fill the opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the copper layer is deposited over the aluminum wetting layer.
Claim 37
Dependent Claim
85 words
A silicon structure comprising: a) an insulating layer deposited over a silicon substrate and having an opening therein; b) a copper diffusion barrier layer deposited on the inside surface of the opening; c) an aluminum wetting layer deposited over the copper diffusion barrier layer; and d) a copper layer deposited over the aluminum wetting layer to fill the opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the copper layer is deposited over the aluminum wetting layer.
Claim 38
Dependent Claim
209 words
A contact level dual damascene comprising: a) a first insulating layer deposited over a silicon substrate and having an opening therein; b) a second insulating layer deposited over the first insulating layer and having an opening therein, wherein the opening in the second insulating layer lies over at least part of the opening in the first insulating layer to form an opening through the first and second insulating layers; c) a refractory metal layer deposited on the inside surface of the opening through the first and second insulating layers; d) a Ti x Al y N z barrier layer deposited over the refractory metal layer wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; and e) a copper layer deposited over the Ti x Al y N z barrier layer to fill the opening through the first and second insulating layers, wherein at least a portion of said silicon substrate lying directly below the refractory metal layer consists at least in part of a refractory metal silicide MSi x after the refractory metal layer is deposited on the inside surface of the opening through the first and second insulating layers.
Claim 39
Dependent Claim
209 words
A contact level dual damascene comprising: a) a first insulating layer deposited over a silicon substrate and having an opening therein; b) a second insulating layer deposited over the first insulating layer and having an opening therein, wherein the opening in the second insulating layer lies over at least part of the opening in the first insulating layer to form an opening through the first and second insulating layers; c) a refractory metal layer deposited on the inside surface of the opening through the first and second insulating layers; d) a Ti x Al y N z barrier layer deposited over the refractory metal layer wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; and e) a copper layer deposited over the Ti x Al y N z barrier layer to fill the opening through the first and second insulating layers, wherein at least a portion of said silicon substrate lying directly below the refractory metal layer consists at least in part of a refractory metal silicide MSi x after the refractory metal layer is deposited on the inside surface of the opening through the first and second insulating layers.
Claim 40
Dependent Claim
211 words
A contact level dual damascene comprising: a) a first insulating layer deposited over a silicon substrate and having an opening therein; b) a second insulating layer deposited over the first insulating layer and having an opening therein, wherein the opening in the second insulating layer lies over at least part of the opening in the first insulating layer to form an opening through the first and second insulating layers; c) a refractory metal layer deposited on the inside surface of the opening through the first and second insulating layers; d) a copper diffusion barrier layer deposited over the refractory metal layer; e) an aluminum wetting layer deposited over the copper diffusion barrier layer; and f) a copper layer deposited over the aluminum wetting layer to fill the opening through the first and second insulating layers, wherein said aluminum layer consists at least in part of a copper aluminum alloy after the copper layer is deposited over the aluminum wetting layer and wherein said at least a portion of the silicon substrate lying directly below the refractory metal layer consists at least in part of a refractory metal silicide MSi x after the refractory metal layer is deposited on the inside surface of the opening through the first and second insulating layers.
Claim 41
Dependent Claim
211 words
A contact level dual damascene comprising: a) a first insulating layer deposited over a silicon substrate and having an opening therein; b) a second insulating layer deposited over the first insulating layer and having an opening therein, wherein the opening in the second insulating layer lies over at least part of the opening in the first insulating layer to form an opening through the first and second insulating layers; c) a refractory metal layer deposited on the inside surface of the opening through the first and second insulating layers; d) a copper diffusion barrier layer deposited over the refractory metal layer; e) an aluminum wetting layer deposited over the copper diffusion barrier layer; and f) a copper layer deposited over the aluminum wetting layer to fill the opening through the first and second insulating layers, wherein said aluminum layer consists at least in part of a copper aluminum alloy after the copper layer is deposited over the aluminum wetting layer and wherein said at least a portion of the silicon substrate lying directly below the refractory metal layer consists at least in part of a refractory metal silicide MSi x after the refractory metal layer is deposited on the inside surface of the opening through the first and second insulating layers.
Claim 42
Dependent Claim
127 words
An interconnect on a silicon substrate comprising: a) a first insulating layer on the silicon substrate having a conductive metal plug therein; b) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having an opening overlying the first insulating layer wherein the opening lies over at least part of the conductive metal plug; c) a copper diffusion barrier layer deposited on the inside surface of the opening; d) an aluminum wetting layer deposited over the copper diffusion barrier layer; and e) a copper layer deposited over the aluminum wetting layer to fill the opening; wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the copper layer is deposited over the aluminum wetting layer.
Claim 43
Dependent Claim
127 words
An interconnect on a silicon substrate comprising: a) a first insulating layer on the silicon substrate having a conductive metal plug therein; b) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having an opening overlying the first insulating layer wherein the opening lies over at least part of the conductive metal plug; c) a copper diffusion barrier layer deposited on the inside surface of the opening; d) an aluminum wetting layer deposited over the copper diffusion barrier layer; and e) a copper layer deposited over the aluminum wetting layer to fill the opening; wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the copper layer is deposited over the aluminum wetting layer.
Claim 44
Dependent Claim
57 words
An interconnect according to claim 24 wherein the copper diffusion barrier is selected from the group consisting of Ti x Al y N z , TaN, TiN and WN wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof.
Claim 45
Dependent Claim
22 words
An interconnect according to claim 24 wherein the copper diffusion barrier layer is between approximately 100 Å to approximately 2000 Å thick.
Claim 46
Dependent Claim
30 words
An interconnect according to claim 24 wherein the aluminum layer, consisting at least in part of a copper aluminum alloy, is between approximately 50 Å to approximately 500 Å thick.
Claim 47
Dependent Claim
13 words
An interconnect according to claim 24 wherein the conductive metal plug is tungsten.
Claim 48
Dependent Claim
15 words
An interconnect according to claim 24 wherein the first insulating layer is borophosphorous silicate glass.
Claim 49
Dependent Claim
14 words
An interconnect according to claim 24 wherein the second insulating layer is silicon oxide.
Claim 50
Dependent Claim
161 words
An interconnect on a silicon substrate comprising: a) a first insulating layer on the silicon substrate having a tungsten plug therein; b) a second insulating layer deposited over the first insulating layer and the tungsten plug and having an opening overlying the first insulating layer, and wherein the opening lies over at least part of the tungsten plug; c) a Ti x Al y N z barrier layer deposited on the inside surface of the opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; d) an aluminum wetting layer deposited over the Ti x Al y N z barrier layer; and e) a copper layer deposited over the aluminum wetting layer to fill the opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the copper layer is deposited over the aluminum wetting layer.
Claim 51
Dependent Claim
161 words
An interconnect on a silicon substrate comprising: a) a first insulating layer on the silicon substrate having a tungsten plug therein; b) a second insulating layer deposited over the first insulating layer and the tungsten plug and having an opening overlying the first insulating layer, and wherein the opening lies over at least part of the tungsten plug; c) a Ti x Al y N z barrier layer deposited on the inside surface of the opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; d) an aluminum wetting layer deposited over the Ti x Al y N z barrier layer; and e) a copper layer deposited over the aluminum wetting layer to fill the opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the copper layer is deposited over the aluminum wetting layer.
Claim 52
Dependent Claim
126 words
An interconnect on a silicon substrate comprising: a) a first insulating layer on the silicon substrate having a conductive metal plug therein; b) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having an opening overlying the first insulating layer wherein the opening lies over at least part of the conductive metal plug; c) a Ti x Al y N z barrier layer deposited on the inside surface of the opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; and d) a copper layer deposited over the Ti x Al y N z barrier layer to fill the opening.
Claim 53
Dependent Claim
126 words
An interconnect on a silicon substrate comprising: a) a first insulating layer on the silicon substrate having a conductive metal plug therein; b) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having an opening overlying the first insulating layer wherein the opening lies over at least part of the conductive metal plug; c) a Ti x Al y N z barrier layer deposited on the inside surface of the opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; and d) a copper layer deposited over the Ti x Al y N z barrier layer to fill the opening.
Claim 54
Dependent Claim
25 words
An interconnect according to claim 32 wherein the Ti x Al y N z barrier layer is approximately 200 Å to approximately 500 Å thick.
Claim 55
Dependent Claim
13 words
An interconnect according to claim 32 wherein the conductive metal plug is tungsten.
Claim 56
Dependent Claim
27 words
An interconnect according to claim 32 wherein the Ti x Al y N z barrier layer is doped with oxygen or an oxygen species O m .
Claim 57
Dependent Claim
249 words
A via level copper/copper dual damascene interconnect on a silicon substrate comprising: a) a first insulating layer on a silicon substrate having a conductive metal plug therein; b) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; c) a first Ti x Al y N z barrier layer deposited on the inside surface of the first opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; d) a first copper layer deposited over the first Ti x , Al y N z barrier layer to fill the first opening; e) a third insulating layer deposited over the second insulating layer and the first copper layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the first copper layer; f) a second Ti x Al y N z barrier layer deposited on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; and g) a second copper layer deposited over the second Ti x Al y N z barrier layer to fill the second opening.
Claim 58
Dependent Claim
249 words
A via level copper/copper dual damascene interconnect on a silicon substrate comprising: a) a first insulating layer on a silicon substrate having a conductive metal plug therein; b) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; c) a first Ti x Al y N z barrier layer deposited on the inside surface of the first opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; d) a first copper layer deposited over the first Ti x , Al y N z barrier layer to fill the first opening; e) a third insulating layer deposited over the second insulating layer and the first copper layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the first copper layer; f) a second Ti x Al y N z barrier layer deposited on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; and g) a second copper layer deposited over the second Ti x Al y N z barrier layer to fill the second opening.
Claim 59
Dependent Claim
244 words
A via level copper/copper dual damascene interconnect on a silicon substrate comprising: a) a first insulating layer on the silicon substrate having a conductive metal plug therein; b) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; c) a copper diffusion barrier layer deposited on the inside surface of the opening; d) an aluminum wetting layer deposited over the copper diffusion barrier layer; e) a first copper layer deposited over the aluminum wetting layer to fill the opening; f) a third insulating layer deposited over the second insulating layer and the first copper layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the first copper layer; g) a Ti x Al y N z barrier layer deposited on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; and h) a second copper layer deposited over the Ti x Al y N z barrier layer to fill the second opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the first copper layer is deposited over the aluminum wetting layer.
Claim 60
Dependent Claim
244 words
A via level copper/copper dual damascene interconnect on a silicon substrate comprising: a) a first insulating layer on the silicon substrate having a conductive metal plug therein; b) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; c) a copper diffusion barrier layer deposited on the inside surface of the opening; d) an aluminum wetting layer deposited over the copper diffusion barrier layer; e) a first copper layer deposited over the aluminum wetting layer to fill the opening; f) a third insulating layer deposited over the second insulating layer and the first copper layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the first copper layer; g) a Ti x Al y N z barrier layer deposited on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; and h) a second copper layer deposited over the Ti x Al y N z barrier layer to fill the second opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the first copper layer is deposited over the aluminum wetting layer.
Claim 61
Dependent Claim
247 words
A via level copper/copper dual damascene interconnect on a silicon substrate comprising: a) a first insulating layer on a silicon substrate having a conductive metal plug therein; b) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least a part of the conductive metal plug; c) a Ti x Al y N z barrier layer deposited on the inside surface of the first opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; d) a first copper layer deposited over the Ti x Al y N z barrier layer to fill the first opening; e) a third insulating layer deposited over the second insulating layer and the first copper layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the first copper layer; f) a copper diffusion barrier layer deposited on the inside surface of the second opening; g) an aluminum wetting layer deposited over the copper diffusion barrier layer; and h) a second copper layer deposited over the aluminum wetting layer to fill the second opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the second copper layer is deposited over the aluminum wetting layer.
Claim 62
Dependent Claim
247 words
A via level copper/copper dual damascene interconnect on a silicon substrate comprising: a) a first insulating layer on a silicon substrate having a conductive metal plug therein; b) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least a part of the conductive metal plug; c) a Ti x Al y N z barrier layer deposited on the inside surface of the first opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; d) a first copper layer deposited over the Ti x Al y N z barrier layer to fill the first opening; e) a third insulating layer deposited over the second insulating layer and the first copper layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the first copper layer; f) a copper diffusion barrier layer deposited on the inside surface of the second opening; g) an aluminum wetting layer deposited over the copper diffusion barrier layer; and h) a second copper layer deposited over the aluminum wetting layer to fill the second opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the second copper layer is deposited over the aluminum wetting layer.
Claim 63
Dependent Claim
262 words
A via level copper/copper dual damascene interconnect on a silicon substrate comprising: a) a first insulating layer on the silicon substrate having a conductive metal plug therein; b) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; c) a first copper diffusion barrier layer deposited on the inside surface of the first opening; d) a first aluminum wetting layer deposited over the first copper diffusion barrier layer; e) a first copper layer deposited over the first aluminum wetting layer to fill the first opening; f) a third insulating layer deposited over the second insulating layer and the first copper layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the first copper layer; g) a second copper diffusion barrier layer on the inside surface of the second opening; h) a second aluminum wetting layer deposited over the second copper diffusion barrier layer; and i) a second copper layer deposited over the second aluminum wetting layer to fill the second opening, wherein said first aluminum wetting layer consists at least in part of a first copper aluminum alloy after the first copper layer is deposited over the first aluminum wetting layer and wherein said second aluminum wetting layer consists at least in part of a second copper aluminum alloy after the second copper layer is deposited over the second aluminum wetting layer.
Claim 64
Dependent Claim
262 words
A via level copper/copper dual damascene interconnect on a silicon substrate comprising: a) a first insulating layer on the silicon substrate having a conductive metal plug therein; b) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; c) a first copper diffusion barrier layer deposited on the inside surface of the first opening; d) a first aluminum wetting layer deposited over the first copper diffusion barrier layer; e) a first copper layer deposited over the first aluminum wetting layer to fill the first opening; f) a third insulating layer deposited over the second insulating layer and the first copper layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the first copper layer; g) a second copper diffusion barrier layer on the inside surface of the second opening; h) a second aluminum wetting layer deposited over the second copper diffusion barrier layer; and i) a second copper layer deposited over the second aluminum wetting layer to fill the second opening, wherein said first aluminum wetting layer consists at least in part of a first copper aluminum alloy after the first copper layer is deposited over the first aluminum wetting layer and wherein said second aluminum wetting layer consists at least in part of a second copper aluminum alloy after the second copper layer is deposited over the second aluminum wetting layer.
Claim 65
Dependent Claim
204 words
A via level aluminum/copper dual damascene interconnect on a silicon substrate comprising: a) a first insulating layer on the silicon substrate having a conductive metal plug therein; b) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; c) a wetting layer for aluminum deposited on the inside surface of the first opening; d) an aluminum layer deposited over the wetting layer for aluminum to fill the first opening; e) a third insulating layer deposited over the second insulating layer and the aluminum layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the aluminum layer; f) a copper diffusion barrier layer deposited on the inside surface of the second opening; g) an aluminum wetting layer deposited over the copper diffusion barrier layer; and h) a copper layer over the aluminum wetting layer to fill the second opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the copper layer is deposited over the aluminum wetting layer.
Claim 66
Dependent Claim
204 words
A via level aluminum/copper dual damascene interconnect on a silicon substrate comprising: a) a first insulating layer on the silicon substrate having a conductive metal plug therein; b) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; c) a wetting layer for aluminum deposited on the inside surface of the first opening; d) an aluminum layer deposited over the wetting layer for aluminum to fill the first opening; e) a third insulating layer deposited over the second insulating layer and the aluminum layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the aluminum layer; f) a copper diffusion barrier layer deposited on the inside surface of the second opening; g) an aluminum wetting layer deposited over the copper diffusion barrier layer; and h) a copper layer over the aluminum wetting layer to fill the second opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the copper layer is deposited over the aluminum wetting layer.
Claim 67
Dependent Claim
217 words
A via level aluminum/copper dual damascene interconnect on a silicon substrate comprising: a) a first insulating layer on the silicon substrate having a conductive metal plug therein; b) a second insulating layer over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; c) an aluminum diffusion barrier layer deposited on the inside surface of the first opening; d) a wetting layer for aluminum deposited over the aluminum diffusion barrier layer; e) an aluminum layer deposited over the wetting layer for aluminum to fill the first opening; f) a third insulating layer deposited over the second insulating layer and the aluminum layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the aluminum layer; g) a copper diffusion barrier layer deposited on the inside surface of the second opening; h) a aluminum wetting layer deposited over the copper diffusion barrier layer; and i) a copper layer deposited over the aluminum wetting layer to fill the second opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the copper layer is deposited over the aluminum wetting layer.
Claim 68
Dependent Claim
217 words
A via level aluminum/copper dual damascene interconnect on a silicon substrate comprising: a) a first insulating layer on the silicon substrate having a conductive metal plug therein; b) a second insulating layer over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; c) an aluminum diffusion barrier layer deposited on the inside surface of the first opening; d) a wetting layer for aluminum deposited over the aluminum diffusion barrier layer; e) an aluminum layer deposited over the wetting layer for aluminum to fill the first opening; f) a third insulating layer deposited over the second insulating layer and the aluminum layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the aluminum layer; g) a copper diffusion barrier layer deposited on the inside surface of the second opening; h) a aluminum wetting layer deposited over the copper diffusion barrier layer; and i) a copper layer deposited over the aluminum wetting layer to fill the second opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the copper layer is deposited over the aluminum wetting layer.
Claim 69
Dependent Claim
202 words
A via level aluminum/copper dual damascene interconnect on a silicon substrate comprising: a) a first insulating layer on the silicon substrate having a conductive metal plug therein; b) a second insulating layer over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; c) a wetting layer for aluminum deposited on the inside surface of the first opening; d) an aluminum layer deposited over the wetting layer for aluminum to fill the first opening; e) a third insulating layer deposited over the second insulating layer and the aluminum layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the aluminum layer; f) a Ti x Al y N z barrier layer deposited on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; and g) a copper layer over the Ti x Al y N z barrier layer to fill the second opening.
Claim 70
Dependent Claim
202 words
A via level aluminum/copper dual damascene interconnect on a silicon substrate comprising: a) a first insulating layer on the silicon substrate having a conductive metal plug therein; b) a second insulating layer over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; c) a wetting layer for aluminum deposited on the inside surface of the first opening; d) an aluminum layer deposited over the wetting layer for aluminum to fill the first opening; e) a third insulating layer deposited over the second insulating layer and the aluminum layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the aluminum layer; f) a Ti x Al y N z barrier layer deposited on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; and g) a copper layer over the Ti x Al y N z barrier layer to fill the second opening.
Claim 71
Dependent Claim
216 words
A via level aluminum/copper dual damascene interconnect on a silicon substrate comprising: a) a first insulating layer on the silicon substrate having a conductive metal plug therein; b) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; c) an aluminum diffusion barrier layer deposited on the inside surface of the first opening; d) a wetting layer for aluminum deposited over the aluminum diffusion barrier layer; e) an aluminum layer deposited over the wetting layer for aluminum to fill the opening; f) a third insulating layer deposited over the second insulating layer and the aluminum layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the aluminum layer; g) a Ti x Al y N z barrier layer deposited on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; and h) a copper layer deposited over the Ti x Al y N z barrier layer to fill the second opening.
Claim 72
Dependent Claim
216 words
A via level aluminum/copper dual damascene interconnect on a silicon substrate comprising: a) a first insulating layer on the silicon substrate having a conductive metal plug therein; b) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; c) an aluminum diffusion barrier layer deposited on the inside surface of the first opening; d) a wetting layer for aluminum deposited over the aluminum diffusion barrier layer; e) an aluminum layer deposited over the wetting layer for aluminum to fill the opening; f) a third insulating layer deposited over the second insulating layer and the aluminum layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the aluminum layer; g) a Ti x Al y N z barrier layer deposited on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; and h) a copper layer deposited over the Ti x Al y N z barrier layer to fill the second opening.
Claim 73
Dependent Claim
128 words
An semiconductor device comprising: a) a silicon substrate; a) a first insulating layer on said silicon substrate having a conductive metal plug therein; b) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having an opening overlying the first insulating layer wherein the opening lies over at least part of the conductive metal plug; c) a copper diffusion barrier layer deposited on the inside surface of the opening; d) an aluminum wetting layer deposited over the copper diffusion barrier layer; and e) a copper layer deposited over the aluminum wetting layer to fill the opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the copper layer is deposited over the aluminum wetting layer.
Claim 74
Dependent Claim
128 words
An semiconductor device comprising: a) a silicon substrate; a) a first insulating layer on said silicon substrate having a conductive metal plug therein; b) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having an opening overlying the first insulating layer wherein the opening lies over at least part of the conductive metal plug; c) a copper diffusion barrier layer deposited on the inside surface of the opening; d) an aluminum wetting layer deposited over the copper diffusion barrier layer; and e) a copper layer deposited over the aluminum wetting layer to fill the opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the copper layer is deposited over the aluminum wetting layer.
Claim 75
Dependent Claim
58 words
An semiconductor device according to claim 44 wherein the copper diffusion barrier is selected from the group consisting of Ti x Al y N z , TaN, TiN and WN wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof.
Claim 76
Dependent Claim
23 words
An semiconductor device according to claim 44 wherein the copper diffusion barrier layer is between approximately 100 Å to approximately 2000 Å thick.
Claim 77
Dependent Claim
31 words
A semiconductor device according to claim 44 wherein the aluminum layer, consisting at least in part of a copper aluminum alloy, is between approximately 50 Å to approximately 700 Å thick.
Claim 78
Dependent Claim
14 words
A semiconductor device according to claim 44 wherein the conductive metal plug is tungsten.
Claim 79
Dependent Claim
161 words
An semiconductor device comprising: a) a silicon substrate; b) a first insulating layer on said silicon substrate having a tungsten plug therein; c) a second insulating layer deposited over the first insulating layer and the tungsten plug and having an opening overlying the first insulating layer wherein the opening lies over at least part of the tungsten plug; d) a Ti x Al y N z barrier layer deposited on the inside surface of the opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; e) an aluminum wetting layer deposited over the Ti x Al y N z barrier layer; and f) a copper layer deposited over the aluminum wetting layer to fill the opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the copper layer is deposited over the aluminum wetting layer.
Claim 80
Dependent Claim
161 words
An semiconductor device comprising: a) a silicon substrate; b) a first insulating layer on said silicon substrate having a tungsten plug therein; c) a second insulating layer deposited over the first insulating layer and the tungsten plug and having an opening overlying the first insulating layer wherein the opening lies over at least part of the tungsten plug; d) a Ti x Al y N z barrier layer deposited on the inside surface of the opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; e) an aluminum wetting layer deposited over the Ti x Al y N z barrier layer; and f) a copper layer deposited over the aluminum wetting layer to fill the opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the copper layer is deposited over the aluminum wetting layer.
Claim 81
Dependent Claim
127 words
A semiconductor device comprising: a) a silicon substrate; b) a first insulating layer on said silicon substrate having a conductive metal plug therein; c) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having an opening overlying the first insulating layer wherein the opening lies over at least part of the conductive metal plug; d) a Ti x Al y N z barrier layer deposited on the inside surface of the opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; and e) a copper layer deposited over the Ti x Al y N z barrier layer to fill the opening.
Claim 82
Dependent Claim
127 words
A semiconductor device comprising: a) a silicon substrate; b) a first insulating layer on said silicon substrate having a conductive metal plug therein; c) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having an opening overlying the first insulating layer wherein the opening lies over at least part of the conductive metal plug; d) a Ti x Al y N z barrier layer deposited on the inside surface of the opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; and e) a copper layer deposited over the Ti x Al y N z barrier layer to fill the opening.
Claim 83
Dependent Claim
26 words
A semiconductor device according to claim 50 wherein the Ti x Al y N z layer is between approximately 100 Å to approximately 2000 Å thick.
Claim 84
Dependent Claim
14 words
A semiconductor device according to claim 50 wherein the conductive metal plug is tungsten.
Claim 85
Dependent Claim
27 words
A semiconductor device according to claim 50 wherein the Ti x Al y N z layer is doped with oxygen or an oxygen species O m .
Claim 86
Dependent Claim
243 words
A semiconductor device comprising: b) a silicon substrate; b) a first insulating layer on said silicon substrate having a conductive metal plug therein; c) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; d) a first Ti x Al y N z barrier layer deposited on the inside surface of the first opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; e) a first copper layer deposited over the first Ti x Al y N z layer to fill the first opening; f) a third insulating layer deposited over the second insulating layer and the first copper layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the first copper layer; g) a second Ti x Al y N z barrier layer deposited on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; and h) a second copper layer deposited over the second Ti x Al y N z barrier layer to fill the second opening.
Claim 87
Dependent Claim
243 words
A semiconductor device comprising: b) a silicon substrate; b) a first insulating layer on said silicon substrate having a conductive metal plug therein; c) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; d) a first Ti x Al y N z barrier layer deposited on the inside surface of the first opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; e) a first copper layer deposited over the first Ti x Al y N z layer to fill the first opening; f) a third insulating layer deposited over the second insulating layer and the first copper layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the first copper layer; g) a second Ti x Al y N z barrier layer deposited on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; and h) a second copper layer deposited over the second Ti x Al y N z barrier layer to fill the second opening.
Claim 88
Dependent Claim
240 words
A semiconductor device comprising: a) a silicon substrate; b) a first insulating layer on said silicon substrate having a conductive metal plug therein; c) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; d) a copper diffusion barrier layer deposited on the inside surface of the opening; e) an aluminum wetting layer deposited over the copper diffusion barrier layer; f) a first copper layer deposited over the aluminum wetting layer to fill the opening; g) a third insulating layer deposited over the second insulating layer and the first copper layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the first copper layer; h) a Ti x Al y N z barrier layer deposited on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; and i) a second copper layer deposited over the Ti x Al y N z barrier layer to fill the second opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the first copper layer is deposited over the aluminum wetting layer.
Claim 89
Dependent Claim
240 words
A semiconductor device comprising: a) a silicon substrate; b) a first insulating layer on said silicon substrate having a conductive metal plug therein; c) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; d) a copper diffusion barrier layer deposited on the inside surface of the opening; e) an aluminum wetting layer deposited over the copper diffusion barrier layer; f) a first copper layer deposited over the aluminum wetting layer to fill the opening; g) a third insulating layer deposited over the second insulating layer and the first copper layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the first copper layer; h) a Ti x Al y N z barrier layer deposited on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; and i) a second copper layer deposited over the Ti x Al y N z barrier layer to fill the second opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the first copper layer is deposited over the aluminum wetting layer.
Claim 90
Dependent Claim
243 words
A semiconductor device comprising: a) a silicon substrate; b) a first insulating layer on said silicon substrate having a conductive metal plug therein; c) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least a part of the conductive metal plug; d) a Ti x Al y N z barrier layer deposited on the inside surface of the first opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof, e) a first copper layer deposited over the Ti x Al y N z barrier layer to fill the first opening; f) a third insulating layer deposited over the second insulating layer and the first copper layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the first copper layer; g) a copper diffusion barrier layer deposited on the inside surface of the second opening; h) an aluminum wetting layer deposited over the copper diffusion barrier layer; and i) a second copper layer deposited over the aluminum wetting layer to fill the second opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the second copper layer is deposited over the aluminum wetting layer.
Claim 91
Dependent Claim
243 words
A semiconductor device comprising: a) a silicon substrate; b) a first insulating layer on said silicon substrate having a conductive metal plug therein; c) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least a part of the conductive metal plug; d) a Ti x Al y N z barrier layer deposited on the inside surface of the first opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof, e) a first copper layer deposited over the Ti x Al y N z barrier layer to fill the first opening; f) a third insulating layer deposited over the second insulating layer and the first copper layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the first copper layer; g) a copper diffusion barrier layer deposited on the inside surface of the second opening; h) an aluminum wetting layer deposited over the copper diffusion barrier layer; and i) a second copper layer deposited over the aluminum wetting layer to fill the second opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the second copper layer is deposited over the aluminum wetting layer.
Claim 92
Dependent Claim
258 words
A semiconductor device comprising: a) a silicon substrate; b) a first insulating layer on said silicon substrate having a conductive metal plug therein; c) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; d) a first copper diffusion barrier layer deposited on the inside surface of the first opening; e) a first aluminum wetting layer deposited over the first copper diffusion barrier layer; f) a first copper layer deposited over the first aluminum wetting layer to fill the first opening; g) a third insulating layer deposited over the second insulating layer and the first copper layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the first copper layer; h) a second copper diffusion barrier layer on the inside surface of the second opening; i) a second aluminum wetting layer deposited over the second copper diffusion barrier layer; and j) a second copper layer deposited over the second aluminum wetting layer to fill the second opening, wherein said first aluminum wetting layer consists at least in part of a first copper aluminum alloy after the first copper layer is deposited over the first aluminum wetting layer and wherein said second aluminum wetting layer consists at least in part of a second copper aluminum alloy after the second copper layer is deposited over the second aluminum wetting layer.
Claim 93
Dependent Claim
258 words
A semiconductor device comprising: a) a silicon substrate; b) a first insulating layer on said silicon substrate having a conductive metal plug therein; c) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; d) a first copper diffusion barrier layer deposited on the inside surface of the first opening; e) a first aluminum wetting layer deposited over the first copper diffusion barrier layer; f) a first copper layer deposited over the first aluminum wetting layer to fill the first opening; g) a third insulating layer deposited over the second insulating layer and the first copper layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the first copper layer; h) a second copper diffusion barrier layer on the inside surface of the second opening; i) a second aluminum wetting layer deposited over the second copper diffusion barrier layer; and j) a second copper layer deposited over the second aluminum wetting layer to fill the second opening, wherein said first aluminum wetting layer consists at least in part of a first copper aluminum alloy after the first copper layer is deposited over the first aluminum wetting layer and wherein said second aluminum wetting layer consists at least in part of a second copper aluminum alloy after the second copper layer is deposited over the second aluminum wetting layer.
Claim 94
Dependent Claim
200 words
A semiconductor device comprising: a) a silicon substrate; b) a first insulating layer on said silicon substrate having a conductive metal plug therein; c) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; d) a wetting layer for aluminum deposited on the inside surface of the first opening; e) an aluminum layer deposited over the wetting layer for aluminum to fill the first opening; f) a third insulating layer deposited over the second insulating layer and the aluminum layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the aluminum layer; g) a copper diffusion barrier layer deposited on the inside surface of the second opening; h) an aluminum wetting layer deposited over the copper diffusion barrier layer; and i) a copper layer over the aluminum wetting layer to fill the second opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the copper layer is deposited over the aluminum wetting layer.
Claim 95
Dependent Claim
200 words
A semiconductor device comprising: a) a silicon substrate; b) a first insulating layer on said silicon substrate having a conductive metal plug therein; c) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; d) a wetting layer for aluminum deposited on the inside surface of the first opening; e) an aluminum layer deposited over the wetting layer for aluminum to fill the first opening; f) a third insulating layer deposited over the second insulating layer and the aluminum layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the aluminum layer; g) a copper diffusion barrier layer deposited on the inside surface of the second opening; h) an aluminum wetting layer deposited over the copper diffusion barrier layer; and i) a copper layer over the aluminum wetting layer to fill the second opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the copper layer is deposited over the aluminum wetting layer.
Claim 96
Dependent Claim
213 words
A semiconductor device comprising: a) a silicon substrate; b) a first insulating layer on said silicon substrate having a conductive metal plug therein; c) a second insulating layer over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; d) an aluminum diffusion barrier layer deposited on the inside surface of the first opening; e) a wetting layer for aluminum deposited over the aluminum diffusion barrier layer; f) an aluminum layer deposited over the wetting layer for aluminum to fill the first opening; g) a third insulating layer deposited over the second insulating layer and the aluminum layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the aluminum layer; h) a copper diffusion barrier layer deposited on the inside surface of the second opening; i) a aluminum wetting layer deposited over the copper diffusion barrier layer; and j) a copper layer deposited over the aluminum wetting layer to fill the second opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the copper layer is deposited over the aluminum wetting layer.
Claim 97
Dependent Claim
213 words
A semiconductor device comprising: a) a silicon substrate; b) a first insulating layer on said silicon substrate having a conductive metal plug therein; c) a second insulating layer over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; d) an aluminum diffusion barrier layer deposited on the inside surface of the first opening; e) a wetting layer for aluminum deposited over the aluminum diffusion barrier layer; f) an aluminum layer deposited over the wetting layer for aluminum to fill the first opening; g) a third insulating layer deposited over the second insulating layer and the aluminum layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the aluminum layer; h) a copper diffusion barrier layer deposited on the inside surface of the second opening; i) a aluminum wetting layer deposited over the copper diffusion barrier layer; and j) a copper layer deposited over the aluminum wetting layer to fill the second opening, wherein said aluminum wetting layer consists at least in part of a copper aluminum alloy after the copper layer is deposited over the aluminum wetting layer.
Claim 98
Dependent Claim
198 words
A semiconductor device comprising: a) a silicon substrate; b) a first insulating layer on said silicon substrate having a conductive metal plug therein; c) a second insulating layer over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; d) a wetting layer for aluminum deposited on the inside surface of the first opening; e) an aluminum layer deposited over the wetting layer for aluminum to fill the first opening; f) a third insulating layer deposited over the second insulating layer and the aluminum layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the aluminum layer; g) a Ti x Al y N z barrier layer deposited on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; and h) a copper layer over the Ti x Al y N z barrier layer to fill the second opening.
Claim 99
Dependent Claim
198 words
A semiconductor device comprising: a) a silicon substrate; b) a first insulating layer on said silicon substrate having a conductive metal plug therein; c) a second insulating layer over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; d) a wetting layer for aluminum deposited on the inside surface of the first opening; e) an aluminum layer deposited over the wetting layer for aluminum to fill the first opening; f) a third insulating layer deposited over the second insulating layer and the aluminum layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the aluminum layer; g) a Ti x Al y N z barrier layer deposited on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; and h) a copper layer over the Ti x Al y N z barrier layer to fill the second opening.
Claim 100
Dependent Claim
212 words
A semiconductor device comprising: a) a silicon substrate; b) a first insulating layer on said silicon substrate having a conductive metal plug therein; c) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; d) an aluminum diffusion barrier layer deposited on the inside surface of the first opening; e) a wetting layer for aluminum deposited over the aluminum diffusion barrier layer; f) an aluminum layer deposited over the wetting layer for aluminum to fill the opening; g) a third insulating layer deposited over the second insulating layer and the aluminum layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the aluminum layer; h) a Ti x Al y N z barrier layer deposited on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; and i) a copper layer deposited over the Ti x Al y N z barrier layer to fill the second opening.
Claim 101
Dependent Claim
212 words
A semiconductor device comprising: a) a silicon substrate; b) a first insulating layer on said silicon substrate having a conductive metal plug therein; c) a second insulating layer deposited over the first insulating layer and the conductive metal plug and having a first opening overlying the first insulating layer wherein the first opening lies over at least part of the conductive metal plug; d) an aluminum diffusion barrier layer deposited on the inside surface of the first opening; e) a wetting layer for aluminum deposited over the aluminum diffusion barrier layer; f) an aluminum layer deposited over the wetting layer for aluminum to fill the opening; g) a third insulating layer deposited over the second insulating layer and the aluminum layer and having a second opening overlying the second insulating layer wherein the second opening lies over at least part of the aluminum layer; h) a Ti x Al y N z barrier layer deposited on the inside surface of the second opening wherein each of x, y, and z is an integer such that each of Ti, Al, and N constitutes greater than 10% of the total atomic composition thereof; and i) a copper layer deposited over the Ti x Al y N z barrier layer to fill the second opening.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-08-16 | 2003-02-15 | 2003-08-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-08-16 | 2007-02-15 | 2007-08-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-08-16 | 2011-02-15 | 2011-08-17 | $7700.00 | Window Closed / Lapsed |