US5915231A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method in an integrated circuit (IC) manufacturing process for identifying and redirecting IC's mis-processed during their manufacture
Assignee: Micron Technology Inc
•
Filing: 1997-02-26
•
Granted: 1999-06-22
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Expires: 2017-02-26
Abstract
Abstract An inventive method of manufacturing IC devices from semiconductor wafers includes providing the wafers and fabricating IC's on the wafers. At probe, a unique fuse ID is stored in each IC, and an electronic wafer map is electronically stored for each wafer indicating the locations of good and bad IC's on the wafer and the fuse ID's of the IC's on the wafer. Each IC is then separated from its wafer to form an IC die, and the IC dice are assembled into IC devices. At the opens/shorts test at the end of assembly, the fuse ID of each IC device is automatically retrieved so the wafer map of the IC device may be accessed and evaluated to identify any IC devices containing bad IC's that have accidentally been assembled into IC devices. These "bad" IC devices are discarded, and the remaining IC devices continue on to back-end testing.
Inventors
- 👤 Raymond J. Beffa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 21:57
CPC Classifications
H; H10; H10P; H10P74/00; H10P74/23; G; G01; G01R; G01R31/00; G01R31/28; G01R31/2851; G01R31/2894; H10P72/00; H10P72/06; H10P72/0618; H10W; H10W46/00; G06; G06F; G06F11/00; G06F11/006; H10W46/401; H10W46/403
Claims Analysis
Total Claims: 27
Claim 1
Independent Claim
137 words
A method in an integrated circuit (IC) manufacturing process for redirecting one or more IC's that have been mis-processed, the IC's being of the type to have a substantially unique identification (ID) code, the method comprising: storing data in association with the ID code of each of the IC's that indicates a process flow within the IC manufacturing process that each of the IC's should undergo; reading the ID code of each of the IC's; accessing the data stored in association with the ID code of each of the IC's; evaluating the data accessed for each of the IC's to identify any IC's that have undergone a process flow within the IC manufacturing process that is different from the process flow their data indicates they should have undergone; and redirecting any IC's identified as having been mis-processed.
Claim 2
Independent Claim
137 words
A method in an integrated circuit (IC) manufacturing process for redirecting one or more IC's that have been mis-processed, the IC's being of the type to have a substantially unique identification (ID) code, the method comprising: storing data in association with the ID code of each of the IC's that indicates a process flow within the IC manufacturing process that each of the IC's should undergo; reading the ID code of each of the IC's; accessing the data stored in association with the ID code of each of the IC's; evaluating the data accessed for each of the IC's to identify any IC's that have undergone a process flow within the IC manufacturing process that is different from the process flow their data indicates they should have undergone; and redirecting any IC's identified as having been mis-processed.
Claim 3
Dependent Claim
33 words
The method of claim 1 wherein the step of storing data comprises storing the ID code of each of the IC's in association with a die location on an electronically stored wafer map.
Claim 4
Dependent Claim
16 words
The method of claim 1 wherein the step of storing data comprises storing data at probe.
Claim 5
Dependent Claim
51 words
The method of claim 1 wherein the step of storing data comprises storing data in association with the ID code of each of the IC's that indicates each of the IC's is one of a good IC suitable for assembly and back-end testing and a bad IC suitable for being discarded.
Claim 6
Dependent Claim
31 words
The method of claim 1 wherein the step of reading the ID code of each of the IC's comprises electrically retrieving a unique fuse ID programmed into each of the IC's.
Claim 7
Dependent Claim
31 words
The method of claim 1 wherein the step of reading the ID code of each of the IC's comprises optically reading a unique ID code provided on each of the IC's.
Claim 8
Dependent Claim
35 words
The method of claim 6 wherein the step of optically reading a unique ID code provided on each of the IC's comprises optically reading a unique laser fuse ID programmed into each of the IC's.
Claim 9
Dependent Claim
37 words
The method of claim 1 wherein the step of reading the ID code of each of the IC's comprises reading the ID code of each of the IC's at an opens/shorts test in the IC manufacturing process.
Claim 10
Dependent Claim
49 words
The method of claim 1 wherein the step of accessing the data stored in association with the ID code of each of the IC's comprises accessing the data stored in association with the ID code of each of the IC's at an opens/shorts test in the IC manufacturing process.
Claim 11
Dependent Claim
39 words
The method of claim 1 wherein the step of evaluating the data comprises evaluating the data accessed for each of the IC's to identify any bad IC's that have accidentally undergone an assembly procedure within the IC manufacturing process.
Claim 12
Dependent Claim
25 words
The method of claim 1 wherein the step of evaluating the data comprises evaluating the data at an opens/shorts test in the IC manufacturing process.
Claim 13
Dependent Claim
26 words
The method of claim 1 wherein the step of redirecting any IC's identified as having been mis-processed comprises discarding any IC's identified as having been mis-processed.
Claim 14
Dependent Claim
21 words
The method of claim 1 wherein the step of redirecting occurs before a back-end test procedure within the IC manufacturing process.
Claim 15
Dependent Claim
34 words
The method of claim 1 further comprising assembling the IC's into packaged IC devices after the step of storing data and before the step of reading the ID code of each of the IC's.
Claim 16
Independent Claim
205 words
A method of manufacturing integrated circuit (IC) devices from semiconductor wafers, the method comprising: providing a plurality of semiconductor wafers; fabricating a plurality of IC's on each of the wafers; causing each of the IC's on each of the wafers to store a substantially unique identification (ID) code; storing data in association with the ID code of each of the IC's that indicates a manufacturing process flow that each of the IC's should undergo; separating each of the IC's on each of the wafers from its wafer to form one of a plurality of IC dice; assembling each of the IC dice into an IC device; reading the ID code associated with each of the IC devices; accessing the data stored in association with the ID code associated with each of the IC devices; evaluating the data accessed for each of the IC devices to identify any IC devices that have undergone a manufacturing process flow that is different from the manufacturing process flow their data indicates they should have undergone; redirecting any IC devices identified as having undergone a manufacturing process flow that is different from the manufacturing process flow their data indicates they should have undergone; and back-end testing any non-redirected IC devices.
Claim 17
Independent Claim
205 words
A method of manufacturing integrated circuit (IC) devices from semiconductor wafers, the method comprising: providing a plurality of semiconductor wafers; fabricating a plurality of IC's on each of the wafers; causing each of the IC's on each of the wafers to store a substantially unique identification (ID) code; storing data in association with the ID code of each of the IC's that indicates a manufacturing process flow that each of the IC's should undergo; separating each of the IC's on each of the wafers from its wafer to form one of a plurality of IC dice; assembling each of the IC dice into an IC device; reading the ID code associated with each of the IC devices; accessing the data stored in association with the ID code associated with each of the IC devices; evaluating the data accessed for each of the IC devices to identify any IC devices that have undergone a manufacturing process flow that is different from the manufacturing process flow their data indicates they should have undergone; redirecting any IC devices identified as having undergone a manufacturing process flow that is different from the manufacturing process flow their data indicates they should have undergone; and back-end testing any non-redirected IC devices.
Claim 18
Dependent Claim
46 words
The method of claim 15 wherein the step of fabricating a plurality of IC's on each of the wafers comprises fabricating IC's selected from a group comprising Dynamic Random Access Memory (DRAM) IC's, Static Random Access Memory (SRAM) IC's, Synchronous DRAM (SDRAM) IC's, and processor IC's.
Claim 19
Dependent Claim
44 words
The method of claim 15 wherein the step of causing each of the IC's on each of the wafers to store a substantially unique ID code comprises programming each of the IC's on each of the wafers to permanently store a unique fuse ID.
Claim 20
Dependent Claim
52 words
The method of claim 17 wherein the step of programming each of the IC's on each of the wafers to permanently store a unique fuse ID comprises programming at least one of fuses and anti-fuses in each of the IC's on each of the wafers to permanently store a unique fuse ID.
Claim 21
Dependent Claim
151 words
The method of claim 15 wherein the step of assembling each of the IC dice into an IC device comprises: picking each of the IC dice from its wafer; placing each of the IC dice onto an epoxy coated bonding site of one of a plurality of lead frames; curing the epoxy on the bonding site of each of the lead frames; wire bonding each of the IC dice to its associated lead frame; injection molding each of the IC dice and its associated lead frame to form one of a plurality of IC packages each having projecting leads; de-flashing the projecting leads of each of the IC packages; curing each of the IC packages; electroplating the projecting leads of each of the IC packages; singulating each of the IC packages into one of a plurality of discrete IC devices; and testing each of the IC devices for opens and shorts.
Claim 22
Dependent Claim
57 words
The method of claim 15 wherein the step of assembling each of the IC dice into an IC device comprises assembling each of the IC dice into an IC device selected from a group comprising a wire bond/lead frame IC device, a Chip-On-Board (COB) IC device, a flip-chip IC device, and a Tape-Automated Bonding (TAB) IC device.
Claim 23
Independent Claim
226 words
A method of manufacturing Multi-Chip Modules (MCM's) from semiconductor wafers, the method comprising: providing a plurality of semiconductor wafers; fabricating a plurality of IC's on each of the wafers; causing each of the IC's on each of the wafers to store a substantially unique identification (ID) code; storing data in association with the ID code of each of the IC's that indicates a manufacturing process flow that each of the IC's should undergo; separating each of the IC's on each of the wafers from its wafer to form one of a plurality of IC dice; assembling one or more of the IC dice into each of a plurality of MCM's; reading the ID code of each of the IC dice in each of the MCM's; accessing the data stored in association with the ID code of each of the IC dice in each of the MCM's; evaluating the data accessed for each of the IC dice in each of the MCM's to identify any MCM's having IC dice that have undergone a manufacturing process flow that is different from the manufacturing process flow their data indicates they should have undergone; redirecting any MCM's identified as having IC dice that have undergone a manufacturing process flow that is different from the manufacturing process flow their data indicates they should have undergone; and back-end testing any non-redirected MCM's.
Claim 24
Independent Claim
226 words
A method of manufacturing Multi-Chip Modules (MCM's) from semiconductor wafers, the method comprising: providing a plurality of semiconductor wafers; fabricating a plurality of IC's on each of the wafers; causing each of the IC's on each of the wafers to store a substantially unique identification (ID) code; storing data in association with the ID code of each of the IC's that indicates a manufacturing process flow that each of the IC's should undergo; separating each of the IC's on each of the wafers from its wafer to form one of a plurality of IC dice; assembling one or more of the IC dice into each of a plurality of MCM's; reading the ID code of each of the IC dice in each of the MCM's; accessing the data stored in association with the ID code of each of the IC dice in each of the MCM's; evaluating the data accessed for each of the IC dice in each of the MCM's to identify any MCM's having IC dice that have undergone a manufacturing process flow that is different from the manufacturing process flow their data indicates they should have undergone; redirecting any MCM's identified as having IC dice that have undergone a manufacturing process flow that is different from the manufacturing process flow their data indicates they should have undergone; and back-end testing any non-redirected MCM's.
Claim 25
Dependent Claim
25 words
The method of claim 21 wherein the MCM's are selected from a group comprising Single In-Line Memory Modules (SIMM's) and Dual In-line Memory Modules (DIMM's).
Claim 26
Independent Claim
336 words
A method of manufacturing integrated circuit (IC) devices from semiconductor wafers, the method comprising: providing a plurality of semiconductor wafers; fabricating a plurality of IC's on each of the wafers; electronically probing each of the IC's on each of the wafers to identify good and bad IC's on each of the wafers; programming each of the IC's on each of the wafers to store a unique fuse identification (ID); storing an electronic wafer map for each wafer that identifies the locations of good and bad IC's on the wafer and associates each IC on the wafer with its fuse ID; sawing each of the IC's on each of the wafers from its wafer to form one of a plurality of discrete IC dice; automatically picking each of the IC dice from its wafer; placing each of the IC dice onto an epoxy coated bonding site of one of a plurality of lead frames; curing the epoxy on the bonding site of each of the lead frames; wire bonding each of the IC dice to its associated lead frame; injection molding each of the IC dice and its associated lead frame to form one of a plurality of IC packages each having projecting leads; de-flashing the projecting leads of each of the IC packages; curing each of the IC packages; electroplating the projecting leads of each of the IC packages; singulating each of the IC packages into one of a plurality of discrete IC devices; testing each of the IC devices for opens and shorts; electrically retrieving the fuse ID associated with each of the IC devices; accessing the wafer map stored in association with the fuse ID associated with each of the IC devices; evaluating the wafer map accessed for each of the IC devices to identify any IC devices that include a bad IC and any IC devices that include a good IC; discarding any IC devices identified as including a bad IC; and back-end testing any IC devices identified as including a good IC.
Claim 27
Independent Claim
336 words
A method of manufacturing integrated circuit (IC) devices from semiconductor wafers, the method comprising: providing a plurality of semiconductor wafers; fabricating a plurality of IC's on each of the wafers; electronically probing each of the IC's on each of the wafers to identify good and bad IC's on each of the wafers; programming each of the IC's on each of the wafers to store a unique fuse identification (ID); storing an electronic wafer map for each wafer that identifies the locations of good and bad IC's on the wafer and associates each IC on the wafer with its fuse ID; sawing each of the IC's on each of the wafers from its wafer to form one of a plurality of discrete IC dice; automatically picking each of the IC dice from its wafer; placing each of the IC dice onto an epoxy coated bonding site of one of a plurality of lead frames; curing the epoxy on the bonding site of each of the lead frames; wire bonding each of the IC dice to its associated lead frame; injection molding each of the IC dice and its associated lead frame to form one of a plurality of IC packages each having projecting leads; de-flashing the projecting leads of each of the IC packages; curing each of the IC packages; electroplating the projecting leads of each of the IC packages; singulating each of the IC packages into one of a plurality of discrete IC devices; testing each of the IC devices for opens and shorts; electrically retrieving the fuse ID associated with each of the IC devices; accessing the wafer map stored in association with the fuse ID associated with each of the IC devices; evaluating the wafer map accessed for each of the IC devices to identify any IC devices that include a bad IC and any IC devices that include a good IC; discarding any IC devices identified as including a bad IC; and back-end testing any IC devices identified as including a good IC.
References Cited (Backward Citations)
US4967381A
Cited
US4958373A
Cited
US5105362A
Cited
US5289113A
Cited
US5103166A
Cited
US5217834A
Cited
US5219765A
Cited
US5294812A
Cited
US5570293A
Cited
JPH0574909A
Cited
US5226118A
Cited
US5271796A
Cited
US5537325A
Cited
US5256578A
Cited
US5355320A
Cited
US5301143A
Cited
US5467304A
Cited
US5568408A
Cited
US5420796A
Cited
US5801965A
Cited
US5511005A
Cited
US5726074A
Cited
US5844803A
Cited
US5856923A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-06-21 | 2002-12-21 | 2003-06-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-06-21 | 2006-12-21 | 2007-06-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-06-21 | 2010-12-21 | 2011-06-22 | $7700.00 | Window Closed / Lapsed |