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US5898595A Expired / Lapsed US ⏱️ 0.0 years remaining

Automated generation of megacells in an integrated circuit design system

Assignee: Bell Semiconductor LLC
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Filing: 1995-05-26
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Granted: 1999-04-27
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Expires: 2015-05-26
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Abstract

Abstract A computer-based system and method automate the generation of megacells in the design and layout of integrated circuits. The preferred method utilizes an automatic design generator having a user interface which receives design requirements for a megacell or other complex integrated circuit design. A megacell processor receives the design requirements for the megacell and retrieves relevant megacell implementations from a megacell library. Stored megacell benchmarks are then retrieved from a megacell benchmark memory and applied to corresponding megacells to determine which of the various implementations optimally satisfies the user design requirements. Once the optimal megacell implementation is selected, the megacell processor produces a logic design consisting of a net list and a physical design consisting of design directives which are then used to place and route the megacell as a finished layout. Once the layout is completed, the finished layout is simulated and tested and test results from the finished layout simulation are then fed back to the automatic design generator where the megacell benchmark memory is updated.

Inventors

  • 👤 Owen S. Bair
  • 👤 Matthew R. Carbonara

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 10:48
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30; G06F30/39

Claims Analysis

Total Claims: 20
Claim 1
Independent Claim 141 words
A method for the automated design of megacells in a computer-based design system, comprising the steps of: receiving design requirements as a high level description language file for a specific megacell; retrieving stored megacell implementations which relate to the megacell specified by the design requirements; selecting from among the stored megacell implementations a single megacell implementation, if any, having stored performance specifications which sufficiently and most closely meet the received design requirement; retrieving a default megacell implementation when no other stored megacell implementation sufficiently meets the received design requirements; separately generating a net list and a physical design which enable production of a finished layout of the selected megacell implementation; testing the finished layout of the selected megacell implementation to generate test results; and modifying the stored performance specifications associated with the selected megacell implementation in accordance with the test results.
Claim 2
Independent Claim 141 words
A method for the automated design of megacells in a computer-based design system, comprising the steps of: receiving design requirements as a high level description language file for a specific megacell; retrieving stored megacell implementations which relate to the megacell specified by the design requirements; selecting from among the stored megacell implementations a single megacell implementation, if any, having stored performance specifications which sufficiently and most closely meet the received design requirement; retrieving a default megacell implementation when no other stored megacell implementation sufficiently meets the received design requirements; separately generating a net list and a physical design which enable production of a finished layout of the selected megacell implementation; testing the finished layout of the selected megacell implementation to generate test results; and modifying the stored performance specifications associated with the selected megacell implementation in accordance with the test results.
Claim 3
Dependent Claim 30 words
The method according to claim 1 for the automated design of megacells in a computer-based design system, wherein the specific megacell design requirements are received through a computer user interface.
Claim 4
Dependent Claim 33 words
The method according to claim 1 for the automated design of megacells in a computer-based design system, wherein the retrieved megacell implementations are of the same megacell type specified by the design requirements.
Claim 5
Dependent Claim 27 words
The method according to claim 1 for the automated design of megacells in a computer-based design system, wherein the retrieved megacell implementations comprise megacell templates and rules.
Claim 6
Dependent Claim 34 words
The method according to claim 1 for the automated design of megacells in a computer-based design system, the method further comprising the step of editing the default megacell in accordance with said design requirements.
Claim 7
Dependent Claim 35 words
The method according to claim 5 for the automated design of megacells in a computer-based design system, the method further comprising the step of generating megacell performance specifications which correspond to the edited default megacell.
Claim 8
Dependent Claim 31 words
The method according to claim 6 for the automated design of megacells in a computer-based design system, wherein the performance specifications are generated by testing layouts of the edited default megacell.
Claim 9
Dependent Claim 172 words
A computer-aided method for generating a circuit layout in the design of integrated circuits, comprising the steps of: receiving a set of user-defined parameters as a high level description language file identifying required specifications for the circuit layout, wherein a specific megacell's design requirements are received; matching the user-defined parameters with circuit implementations stored in a cell library; applying benchmark data to the matched circuit implementations; selecting a preferred circuit implementation, if any, from among the matched circuit implementations based on the benchmark data; retrieving a default megacell implementation when no other stored megacell implementation sufficiently meets the received design requirements; customizing the selected circuit implementation according to the user-defined parameters; generating a separate logic design and physical design which define the customized circuit implementation; generating a finished layout of the circuit implementation utilizing said logic design and said physical design; testing the finished layout of the selected customized circuit implementation to generate test results; and modifying the benchmark data associated with the selected circuit implementation in accordance with the test results.
Claim 10
Dependent Claim 172 words
A computer-aided method for generating a circuit layout in the design of integrated circuits, comprising the steps of: receiving a set of user-defined parameters as a high level description language file identifying required specifications for the circuit layout, wherein a specific megacell's design requirements are received; matching the user-defined parameters with circuit implementations stored in a cell library; applying benchmark data to the matched circuit implementations; selecting a preferred circuit implementation, if any, from among the matched circuit implementations based on the benchmark data; retrieving a default megacell implementation when no other stored megacell implementation sufficiently meets the received design requirements; customizing the selected circuit implementation according to the user-defined parameters; generating a separate logic design and physical design which define the customized circuit implementation; generating a finished layout of the circuit implementation utilizing said logic design and said physical design; testing the finished layout of the selected customized circuit implementation to generate test results; and modifying the benchmark data associated with the selected circuit implementation in accordance with the test results.
Claim 11
Dependent Claim 18 words
The method according to claim 8, wherein the user-defined parameters are entered through a menu driven computer interface.
Claim 12
Dependent Claim 31 words
The method according to claim 8, wherein the cell library contains a plurality of circuit implementations each circuit implementation comprising at least one set of rules and one set of templates.
Claim 13
Independent Claim 212 words
A system for designing megacell integrated circuit layouts, comprising: a cell library containing a plurality of available circuit implementations; a benchmark library containing performance specifications related to the circuit implementations stored in the cell library; a user interface for receiving user design requirements as a VHDL file; a processor coupled to the cell library and to the user interface for selecting a preferred circuit implementation, if any, from among the plurality of circuit implementations in the cell library according to the user design requirements received by the user interface; retrieving a default megacell implementation when no other stored megacell implementation sufficiently meets the received design requirements; an electrical design generator coupled to the processor for receiving the selected circuit implementation and generating a net list; a physical design generator coupled to the processor for receiving the selected circuit implementation and generating a set of physical design directives; a circuit router coupled to the electrical design generator and to the physical design generator for receiving the net list and the physical design directives and for generating a finished layout; and a simulator coupled to the router and to the benchmark library for testing the performance of the finished layout and for transmitting test results to the benchmark library for storage as performance specifications.
Claim 14
Independent Claim 212 words
A system for designing megacell integrated circuit layouts, comprising: a cell library containing a plurality of available circuit implementations; a benchmark library containing performance specifications related to the circuit implementations stored in the cell library; a user interface for receiving user design requirements as a VHDL file; a processor coupled to the cell library and to the user interface for selecting a preferred circuit implementation, if any, from among the plurality of circuit implementations in the cell library according to the user design requirements received by the user interface; retrieving a default megacell implementation when no other stored megacell implementation sufficiently meets the received design requirements; an electrical design generator coupled to the processor for receiving the selected circuit implementation and generating a net list; a physical design generator coupled to the processor for receiving the selected circuit implementation and generating a set of physical design directives; a circuit router coupled to the electrical design generator and to the physical design generator for receiving the net list and the physical design directives and for generating a finished layout; and a simulator coupled to the router and to the benchmark library for testing the performance of the finished layout and for transmitting test results to the benchmark library for storage as performance specifications.
Claim 15
Dependent Claim 27 words
The system for designing integrated circuit layouts according to claim 11, wherein the cell library comprises rules and templates related to the plurality of available circuit implementations.
Claim 16
Independent Claim 151 words
A system for the automated design of megacells in a computer-based design system, the system comprising: means for receiving design requirements as a VHDL file for a specific megacell; means for receiving stored megacell implementations which relate to the megacell specified by the design requirements; means for selecting from among the stored megacell implementations, if any, a single megacell implementation having stored performance specifications which sufficiently and most closely meet the received design requirement; means for retrieving a default megacell implementation when no other stored megacell implementation sufficiently meets the received design requirements; means for separately generating a net list and a physical design which enable production of a finished layout of the selected megacell implementation; means for testing the finished layout of the selected megacell implementation to generate test results; and means for modifying the stored performance specifications associated with the selected megacell implementation in accordance with the test results.
Claim 17
Independent Claim 151 words
A system for the automated design of megacells in a computer-based design system, the system comprising: means for receiving design requirements as a VHDL file for a specific megacell; means for receiving stored megacell implementations which relate to the megacell specified by the design requirements; means for selecting from among the stored megacell implementations, if any, a single megacell implementation having stored performance specifications which sufficiently and most closely meet the received design requirement; means for retrieving a default megacell implementation when no other stored megacell implementation sufficiently meets the received design requirements; means for separately generating a net list and a physical design which enable production of a finished layout of the selected megacell implementation; means for testing the finished layout of the selected megacell implementation to generate test results; and means for modifying the stored performance specifications associated with the selected megacell implementation in accordance with the test results.
Claim 18
Dependent Claim 19 words
The system according to claim 13, wherein the specific megacell design requirements are received through a computer user interface.
Claim 19
Dependent Claim 22 words
The system according to claim 13, wherein the retrieved megacell files are of a type of megacell specified by the design requirements.
Claim 20
Dependent Claim 16 words
The system according to claim 13, wherein the retrieved megacell implementations comprise megacell templates and rules.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-04-26 2002-10-26 2003-04-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-04-26 2006-10-26 2007-04-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-04-26 2010-10-26 2011-04-27 $7700.00 Window Closed / Lapsed

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