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Method for fabricating thin-film transistor

Assignee: Sharp Corp
•
Filing: 1995-08-02
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Granted: 1999-03-09
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Expires: 2015-08-02
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Abstract

Abstract To form a contact layer on source and drain electrodes of a stagger-type TFT, a conductive material is selectively sticked to the surface of the source and drain electrodes and a contact layer is selectively deposited by using the conductive material as growth species to form an active semiconductor layer on the contact layer. For an inverted-stagger-type TFT, a conductive material is selectively deposited on the surface of a contact layer to use the selectively deposited conductive material as source and drain electrodes so that patterning is unnecessary. To selectively deposit a contact layer of a TFT by alternately repeating etching and deposition, the temperature for the etching is set to 200° C. or lower. A contaminated layer on the surface of a semiconductor film serving as an active semiconductor layer and contact layer of a TFT is removed by plasma at the temperature of 200° C. or lower. For a stagger-type thin-film transistor, the hydrogen or halogen content of an insulating film serving as the substrate of source and drain electrodes is increased. For an inverted-stagger thin-film transistor, the hydrogen or halogen content of an insulating film serving as a channel protective film is increased. Thus, the etching rate of the surfaces of these insulating films by plasma increases.

Inventors

  • 👤 Ken-ichi Yanai
  • 👤 Tsutomu Tanaka
  • 👤 Koji Ohgata
  • 👤 Yutaka Takizawa
  • 👤 Ken-ichi Oki
  • 👤 Takuya Hirano

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 11:02
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0321; H10D30/0312; H10D30/0314; H10D30/0316; H10D30/60; H10D30/67; H10D30/6704; H10D30/6713; H10D30/6729; H10D30/6737; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6757; H10D30/6758; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0113; H10P; H10P14/00; H10P14/20; H10P14/24; H10P14/29; H10P14/2901; H10P14/2921; H10P14/2922; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/3438; H10P14/3441; H10P14/3442; G; G02; G02F; G02F1/00; G02F1/01; G02F1/13; G02F1/133; G02F1/136; G02F1/1362; G02F1/1368

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 159 words
A method for fabricating a stagger-type thin-film transistor, comprising the steps of: forming on a substrate insulator a transparent and conductive film which is made of crystal other than single crystal and which partially constitutes a source electrode, a drain electrode, and a picture element electrode; forming an impurity-contained semiconductor film on said substrate insulator and each electrode of said transparent and conductive film; patterning the impurity-contained semiconductor film so as to partially expose each electrode of said transparent and conductive film; etching the surface of the patterned impurity-contained semiconductor film with one of hydrogen and halogen plasma by controlling the temperature of said substrate insulator to be below a solid phase crystal growth temperature of said transparent and conductive film; forming an active semiconductor layer so as to cover the etched impurity-contained semiconductor film and the substrate insulator; forming a gate insulating film on the active semiconductor layer; and forming a gate electrode on said gate insulating film.
Claim 2
Independent Claim 159 words
A method for fabricating a stagger-type thin-film transistor, comprising the steps of: forming on a substrate insulator a transparent and conductive film which is made of crystal other than single crystal and which partially constitutes a source electrode, a drain electrode, and a picture element electrode; forming an impurity-contained semiconductor film on said substrate insulator and each electrode of said transparent and conductive film; patterning the impurity-contained semiconductor film so as to partially expose each electrode of said transparent and conductive film; etching the surface of the patterned impurity-contained semiconductor film with one of hydrogen and halogen plasma by controlling the temperature of said substrate insulator to be below a solid phase crystal growth temperature of said transparent and conductive film; forming an active semiconductor layer so as to cover the etched impurity-contained semiconductor film and the substrate insulator; forming a gate insulating film on the active semiconductor layer; and forming a gate electrode on said gate insulating film.
Claim 3
Dependent Claim 36 words
A method for fabricating a thin-film transistor according to claim 1, wherein each electrode of the transparent and conductive film is made of a material selected from the group consisting of metal oxide and metal nitride.
Claim 4
Dependent Claim 28 words
A method for fabricating a thin-film transistor according to claim 2, wherein said material is one of indium-tin oxide, tin oxide, zinc oxide, nickel oxide, and titanium nitride.
Claim 5
Dependent Claim 44 words
A method for fabricating a thin-film transistor according to claim 1, wherein the step of etching the surface of the patterned impurity-contained semiconductor film and said step of forming the active semiconductor layer are performed in an atmosphere of a pressure below 1 Torr.
Claim 6
Dependent Claim 40 words
A method for fabricating a thin-film transistor according to claim 1, wherein the step of etching the surface of the patterned impurity-contained semiconductor film and the step of forming the active semiconductor layer are continuously performed in different reaction chambers.
Claim 7
Dependent Claim 39 words
A method for fabricating a thin-film transistor according to claim 1, wherein said step of etching the surface of the patterned impurity-contained semiconductor film is performed while controlling the temperature of said substrate insulator to be at room temperature.
Claim 8
Dependent Claim 34 words
A method for fabricating a thin-film transistor according to claim 1, wherein each electrode of said transparent and conductive film is made of indium-tin-oxide, said solid phase crystal growth temperature is approximately 200° C.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-03-08 2002-09-07 2003-03-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-03-08 2006-09-07 2007-03-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-03-08 2010-09-07 2011-03-09 $7700.00 Window Closed / Lapsed

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