Methods of forming BiCMOS devices having dual-layer emitter electrodes and thin-film transistors therein

Claim 1

A method of forming a BiCMOS semiconductor device, comprising the steps of: forming base and collector regions of a bipolar junction transistor in a semiconductor substrate; forming an insulated-gate field effect transistor having source and drain regions in the semiconductor substrate; forming a first emitter electrode of first conductivity type in contact with the base region while simultaneously forming a first gate electrode of a first thin-film transistor adjacent the insulated-gate field effect transistor; forming an electrically insulating layer on the first emitter electrode and first gate electrode; patterning the electrically insulating layer to expose a portion of the first emitter electrode; and forming a second emitter electrode of first conductivity type on the exposed portion of the first emitter electrode while simultaneously forming a first active region of the first thin-film transistor on the electrically insulating layer so that the first active region extends opposite the first gate electrode.

Claim 2

A method of forming a BiCMOS semiconductor device, comprising the steps of: forming base and collector regions of a bipolar junction transistor in a semiconductor substrate; forming an insulated-gate field effect transistor having source and drain regions in the semiconductor substrate; forming a first emitter electrode of first conductivity type in contact with the base region while simultaneously forming a first gate electrode of a first thin-film transistor adjacent the insulated-gate field effect transistor; forming an electrically insulating layer on the first emitter electrode and first gate electrode; patterning the electrically insulating layer to expose a portion of the first emitter electrode; and forming a second emitter electrode of first conductivity type on the exposed portion of the first emitter electrode while simultaneously forming a first active region of the first thin-film transistor on the electrically insulating layer so that the first active region extends opposite the first gate electrode.

Claim 11

A method of forming a bipolarjunction transistor, comprising the steps of: forming a semiconductor substrate containing a collector region of first conductivity type therein extending to a face thereof and an intrinsic base region of second conductivity type in the collector region and forming a P-N junction therewith; forming a first electrically insulating layer on the intrinsic base region; patterning the first electrically insulating layer to expose a first portion of the intrinsic base region; forming a base electrode of second conductivity type in contact with the exposed first portion of the intrinsic base region; forming a second electrically insulating layer on the base electrode and on a portion of the first electrically insulating layer extending opposite the intrinsic base region; patterning the second electrically insulating layer and the first electrically insulating layer to expose a second portion of the intrinsic base region; forming a first emitter electrode layer of first conductivity type in contact with the exposed second portion of the intrinsic base region; forming a third electrically insulating layer on the first emitter electrode layer, opposite the intrinsic base region; patterning the third electrically insulating layer to expose a portion of the first emitter electrode layer extending opposite the intrinsic base region; forming a second emitter electrode layer of first conductivity type in contact with the first emitter electrode layer; and diffusing dopants of first conductivity type from the first and second emitter electrode layers into the intrinsic base region to define an emitter region of first conductivity type therein while simultaneously diffusing dopants of second conductivity type from the base electrode into the intrinsic base region to define an extrinsic base region therein.

Claim 12

A method of forming a bipolarjunction transistor, comprising the steps of: forming a semiconductor substrate containing a collector region of first conductivity type therein extending to a face thereof and an intrinsic base region of second conductivity type in the collector region and forming a P-N junction therewith; forming a first electrically insulating layer on the intrinsic base region; patterning the first electrically insulating layer to expose a first portion of the intrinsic base region; forming a base electrode of second conductivity type in contact with the exposed first portion of the intrinsic base region; forming a second electrically insulating layer on the base electrode and on a portion of the first electrically insulating layer extending opposite the intrinsic base region; patterning the second electrically insulating layer and the first electrically insulating layer to expose a second portion of the intrinsic base region; forming a first emitter electrode layer of first conductivity type in contact with the exposed second portion of the intrinsic base region; forming a third electrically insulating layer on the first emitter electrode layer, opposite the intrinsic base region; patterning the third electrically insulating layer to expose a portion of the first emitter electrode layer extending opposite the intrinsic base region; forming a second emitter electrode layer of first conductivity type in contact with the first emitter electrode layer; and diffusing dopants of first conductivity type from the first and second emitter electrode layers into the intrinsic base region to define an emitter region of first conductivity type therein while simultaneously diffusing dopants of second conductivity type from the base electrode into the intrinsic base region to define an extrinsic base region therein.