US5811879A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Stacked leads-over-chip multi-chip module
Assignee: Round Rock Research LLC
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Filing: 1997-11-20
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Granted: 1998-09-22
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Expires: 2017-11-20
Abstract
Abstract A multi-chip module (MCM) and method of manufacturing is disclosed that provides for attachment of semiconductor dice to both sides of the MCM printed circuit board (PCB). Semiconductor dice attached to the top surface of the PCB may be attached by conventional wire bonding, TAB or flip chip methods whereas those semiconductor dice attached to the bottom surface of the PCB are wire bonded or TAB connected to the top surface through openings in the PCB. The openings provide a lead-over-chip (LOC) arrangement for those semiconductor dice attached to the bottom surface resulting in shortened wire bonds. The bottom surface of the PCB may be provided with die recesses into which the openings extend, to receive the dice and bring their active surfaces even closer to the top surface of the PCB for wire bonding.
Inventors
- 👤 Salman Akram
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 02:42
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/611; H10W70/62; H10W70/63; H10W70/635; H10W70/67; H10W70/68; H10W74/00; H10W74/10; H10W74/111; H10W74/114; H10W90/00; H10W70/682; H10W72/00; H10W72/071; H10W72/075; H10W72/20; H10W72/29; H10W72/50; H10W72/551; H10W72/552; H10W72/5522; H10W72/5524; H10W72/851; H10W72/853; H10W72/865; H10W72/90; H10W72/941; H10W72/944; H10W72/9445; H10W74/15; H10W90/701; H10W90/721; H10W90/724; H10W90/731; H10W90/734; H10W90/751; H10W90/754
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
189 words
A multi-chip module, comprising: a carrier substrate having a top surface and a bottom surface, said substrate defining at least one opening therethrough bounded by a periphery and said top surface including a plurality of conductive areas thereon, at least one of which lies laterally adjacent said at least one opening; at least one semiconductor die having an active surface including a plurality of bond pads, said at least one semiconductor die secured to said substrate with said active surface facing said bottom surface with said plurality of bond pads exposed through said at least one opening and at least one of said exposed bond pads electrically connected to said at least one laterally adjacent conductive area by a discrete, elongated intermediate conductive element extending through said at least one opening and spaced apart from the periphery thereof and over said top surface; and at least one other semiconductor die secured to said top surface of said substrate and having an active surface including a plurality of bond pads, said active surface facing said top surface and electrically connected to at least another of said plurality of conductive areas.
Claim 2
Dependent Claim
189 words
A multi-chip module, comprising: a carrier substrate having a top surface and a bottom surface, said substrate defining at least one opening therethrough bounded by a periphery and said top surface including a plurality of conductive areas thereon, at least one of which lies laterally adjacent said at least one opening; at least one semiconductor die having an active surface including a plurality of bond pads, said at least one semiconductor die secured to said substrate with said active surface facing said bottom surface with said plurality of bond pads exposed through said at least one opening and at least one of said exposed bond pads electrically connected to said at least one laterally adjacent conductive area by a discrete, elongated intermediate conductive element extending through said at least one opening and spaced apart from the periphery thereof and over said top surface; and at least one other semiconductor die secured to said top surface of said substrate and having an active surface including a plurality of bond pads, said active surface facing said top surface and electrically connected to at least another of said plurality of conductive areas.
Claim 3
Dependent Claim
26 words
The multi-chip module of claim 1, wherein said at least one semiconductor die secured to said top surface is positioned over said at least one opening.
Claim 4
Dependent Claim
27 words
The multi-chip module of claim 1, wherein said at least one semiconductor die secured to said top surface is positioned laterally adjacent said at least one opening.
Claim 5
Dependent Claim
42 words
The multi-chip module of claim 1, wherein said at least one semiconductor die secured to said top surface is electrically connected to at least one of said plurality of conductive areas on said top surface by a conductive structure comprising TAB connections.
Claim 6
Dependent Claim
35 words
The multi-chip module of claim 1, wherein said at least one semiconductor die secured to said top surface is flip-chip bonded to at least one of said plurality of conductive areas on said top surface.
Claim 7
Dependent Claim
40 words
The multi-chip module of claim 1, wherein at least one of said plurality of conductive areas of said substrate lies over at least a portion of said active surface of said at least one semiconductor die facing said bottom surface.
Claim 8
Dependent Claim
22 words
The multi-chip module of claim 6, wherein said intermediate conductive element is selected from the group comprising bond wires and TAB connections.
Claim 9
Dependent Claim
47 words
The multi-chip module of claim 1, wherein said bottom surface defines at least one recess sized and shaped to receive said at least one semiconductor die facing said bottom surface at least partially therewithin, said at least one recess in communication with said at least one opening.
Claim 10
Dependent Claim
25 words
The multi-chip module of claim 1, further including an adhesive bond between said at least one semiconductor die facing said bottom surface and said substrate.
Claim 11
Dependent Claim
34 words
The multi-chip module of claim 1, wherein said plurality of conductive areas is in electrical communication with edge-connects at a periphery of said carrier substrate for electrically communicating said multi-chip module with external circuitry.
Claim 12
Dependent Claim
20 words
The multi-chip module of claim 1, wherein said at least one opening comprises a plurality of elongated, mutually parallel openings.
Claim 13
Dependent Claim
25 words
The multi-chip module of claim 11, further including at least one other elongated opening oriented in non-parallel relationship to said plurality of mutually parallel openings.
Claim 14
Dependent Claim
44 words
The multi-chip module of claim 1, wherein said at least one other semiconductor die attached to said top surface is flip-chip bonded to at least one of said plurality of conductive areas on said top surface and positioned over said at least one opening.
Claim 15
Dependent Claim
28 words
The multi-chip module of claim 13, further including an underfill compound disposed between said at least one other die attached to said top surface and said top surface.
Claim 16
Dependent Claim
20 words
The multi-chip module of claim 14, wherein said underfill compound extends at least partially into said at least one opening.
Claim 17
Dependent Claim
19 words
The multi-chip module of claim 15, wherein said underfill compound substantially envelopes said at least one intermediate conductive element.
Claim 18
Dependent Claim
133 words
A semiconductor die assembly, comprising: a carrier substrate having a plurality of slots therethrough and a plurality of conductors on a first side of said carrier substrate laterally adjacent said plurality of slots, said conductors in electrical communication with a plurality of conductive bumps transversely projecting from said first side for electrically connecting said carrier substrate to a higher-level package; at least one semiconductor die secured to said carrier substrate adjacent a second side thereof opposite said first side and having a plurality of bond pads exposed through said at least one slot; and individual, elongated intermediate conductive elements extending through and spaced apart from a periphery of said at least one slot and connecting at least some of said plurality of conductors to at least some of said plurality of bond pads.
Claim 19
Dependent Claim
133 words
A semiconductor die assembly, comprising: a carrier substrate having a plurality of slots therethrough and a plurality of conductors on a first side of said carrier substrate laterally adjacent said plurality of slots, said conductors in electrical communication with a plurality of conductive bumps transversely projecting from said first side for electrically connecting said carrier substrate to a higher-level package; at least one semiconductor die secured to said carrier substrate adjacent a second side thereof opposite said first side and having a plurality of bond pads exposed through said at least one slot; and individual, elongated intermediate conductive elements extending through and spaced apart from a periphery of said at least one slot and connecting at least some of said plurality of conductors to at least some of said plurality of bond pads.
Claim 20
Dependent Claim
45 words
The semiconductor die assembly of claim 17, further including at least one recess in said second side of said carrier substrate into which said at least one slot opens, said at least one recess receiving said at least one semiconductor die at least partially therewithin.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-09-21 | 2002-03-23 | 2002-09-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-09-21 | 2006-03-23 | 2006-09-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-09-21 | 2010-03-23 | 2010-09-22 | $7700.00 | Window Closed / Lapsed |