High density multi-chip interconnection and cooling package

Claim 2

A structure for orienting first and second bodies, comprising: means for mounting at least one second body; a flexible membrane adapted for mounting at least one first body with a surface thereof facing a corresponding adjacent surface of the second body; and means for biasing the two bodies together such that the flexible membrane conforms the alignment of the surface of the first body to the adjacent surface of the second body and the bodies make contact along the facing surfaces.

Claim 3

The structure of claim 1, wherein the first body includes a passageway for flowing fluid therethrough to transfer heat between the two bodies.

Claim 4

The structure of claim 2, wherein the first body is a heat sink element; the passageway comprises a plurality of generally parallel channels adjacent the second body; and wherein the heat sink element also comprises means for directing fluid into and exhausting fluid from the passageway.

Claim 5

The structure of claim 2, wherein the first body is a heat sink element; the means for mounting the second body is adapted for mounting a multiplicity of such bodies in a generally planar array; and wherein the flexible membrane is adapted for mounting a multiplicity of the heat sink elements (a) collectively in a generally planar matrix which is substantially aligned with the array of second bodies and (b) individually in an alterable orientation for permitting adapting of the orientation of the facing surface thereof to that of a corresponding second body when the two bodies are biased together.

Claim 6

The structure of claim 4, wherein the matrix of heat sink elements comprises at least one channel formed by adjacent heat sink elements having their passageways aligned end-to-end for providing fluid flow from one end of the channel to the other.

Claim 7

The structure of claim 4, wherein the matrix of heat sink elements comprises at least one channel formed by adjacent heat sink elements having their passageways aligned end-to-end for providing fluid flow from one end of the channel to the other; and wherein the means for mounting the second bodies is adapted for mounting an m×n array of such bodies.

Claim 8

The structure of claim 6, wherein the flexible membrane mounts the heat sink elements as an m×n matrix corresponding to the array of second bodies.

Claim 9

An assembly for orienting first and second bodies such as heat sink elements and semiconductor bodies, comprising: means for mounting an array of one or more of the semiconductor bodies; a flexible membrane adapted for mounting at least one of the heat sink elements with a surface thereof facing a corresponding surface of the semiconductor body; and, means for biasing the two bodies together so that the flexible membrane allows the heat sink surface to conform to the semiconductor body surface and the two bodies make contact along the facing surfaces.

Claim 10

An assembly for orienting first and second bodies such as heat sink elements and semiconductor bodies, comprising: means for mounting an array of one or more of the semiconductor bodies; a flexible membrane adapted for mounting at least one of the heat sink elements with a surface thereof facing a corresponding surface of the semiconductor body; and, means for biasing the two bodies together so that the flexible membrane allows the heat sink surface to conform to the semiconductor body surface and the two bodies make contact along the facing surfaces.

Claim 11

The assembly of claim 8, wherein the semiconductor body comprises an integrated circuit chip and a heat spreader plate bonded to the integrated circuit chip along one major surface of the plate so that the other major surface serves as said facing, heat transfer surface of the semiconductor body.

Claim 12

The assembly of claim 9, wherein the heat transfer surface of the heat sink element is copper.

Claim 13

The assembly of claim 9, wherein the heat spreader plate is molybdenum.

Claim 14

The assembly of claim 9, wherein the facing surfaces of the heat spreader plate and the heat sink element, are, respectively, molybdenum and copper.

Claim 15

The assembly of claim 9, wherein the integrated circuit chip includes surface mounted contacts.

Claim 16

The assembly of claim 9, wherein the integrated circuit chip includes ball bonded contacts.

Claim 17

The assembly of claim 9, wherein the integrated circuit chip includes tape automated bonded contacts.

Claim 18

The assembly of claim 8, wherein the heat sink element includes a passageway for flowing fluid therethrough to transfer heat between the two bodies.

Claim 19

The assembly of claim 16, wherein the heat sink passageway of the heat sink element comprises a plurality of generally parallel channels; and, wherein the assembly further comprises means for directing fluid into and exhausting fluid from the passageway.

Claim 20

The assembly of claim 16, wherein the means for mounting the semiconductor body is adapted for mounting a multiplicity of such bodies in a generally planar array; and wherein the flexible membrane is adapted for mounting a multiplicity of the heat sink elements (a) collectively in a generally planar matrix which is substantially aligned with the array of second bodies and (b) individually in an alterable orientation, for permitting adapting of the orientation of the facing surface thereof to that of a corresponding semiconductor body when the two bodies are biased together.

Claim 21

The assembly of claim 18, wherein the matrix of heat sink elements comprises at least one channel formed by adjacent heat sink elements having their passageways aligned end-to-end for providing fluid flow from one end of the channel to the other.

Claim 22

The assembly of claim 18, wherein the matrix of heat sink elements comprises at least one channel formed by adjacent heat sink elements having their passageways aligned end-to-end for providing fluid flow from one end of the channel to the other; and wherein the means for mounting these semiconductor bodies is adapted for mounting an m×n array of said bodies.

Claim 23

The assembly of claim 20, wherein the flexible membrane mounts the heat sink elements in an m×n matrix corresponding to the m×n array of semiconductor bodies.

Claim 24

The assembly of claim 9, wherein the heat sink element includes a passageway for flowing fluid therethrough to transfer heat between the two bodies.

Claim 25

The assembly of claim 22, wherein the heat sink passageway of the heat sink element comprises a plurality of generally parallel channels; and, wherein the assembly further comprises means for directing fluid into and exhausting fluid from the passageway.

Claim 26

The assembly of claim 22, wherein the means for mounting the semiconductor body is adapted for mounting a multiplicity of such bodies in a generally planar array; and wherein the flexible membrane is adapted for mounting a multiplicity of the heat sink elements (a) collectively in a generally planar matrix which is substantially aligned with the array of second bodies and (b) individually in an alterable orientation, for permitting adapting of the orientation of the facing surface thereof to that of a corresponding semiconductor body when the two bodies are biased together.

Claim 27

The assembly of claim 24, wherein the matrix of heat sink elements comprises at least one channel formed by adjacent heat sink elements having their passageways aligned end-to-end for providing fluid flow from one end of the channel to the other.

Claim 28

The assembly of claim 24, wherein the matrix of heat sink elements comprises at least one channel formed by adjacent heat sink elements having their passageways aligned end-to-end for providing fluid flow from one end of the channel to the other; and wherein the means for mounting the semiconductor bodies is adapted for mounting an m×n array of said bodies.

Claim 29

The assembly of claim 26, wherein the flexible membrane mounts the heat sink elements in an m×n matrix corresponding to the m×n array of semiconductor bodies.

Claim 30

The assembly of claim 27, wherein the facing surfaces of the heat spreader plate and the heat sink element, are, respectively, molybdenum and copper.

Claim 31

The assembly of claim 27, wherein the integrated circuit chip includes surface mounted contacts.

Claim 32

The assembly of claim 27, wherein the integrated circuit chip includes ball bonded contacts.

Claim 33

The assembly of claim 27, wherein the integrated circuit chip includes tape automated bonded contacts.

Claim 34

The assembly of claim 16 or 22, wherein each semiconductor body comprises a first group of contacts for providing power supply voltages to the semiconductor body and a second group of contacts for providing signal voltages to the semiconductor body and, wherein, the assembly further comprises an intra-assembly connector, which comprises: (a) the means for mounting the array of semiconductor bodies, said means being configured to correspond generally to the array of heat sink elements, said means having a pair of major surfaces on opposite sides thereof, the first surface being adjacent to the array of heat sink elements and the second surface being a base surface, and said means also having a periphery between the first and second opposite surfaces; (b) means, including an array of contacts in the form of terminal pins mounted at said periphery for connecting the chip power contacts or terminals to external power supply means; and (c) means, including an array of contacts mounted on said base surface, for connecting the chip signal contacts or terminals to external signal circuit means.

Claim 35

The assembly of claim 16 or 22, wherein each semiconductor body comprises contacts for providing power supply voltages to the semiconductor body and contacts for providing signal voltages to the semiconductor body and, wherein, the assembly further comprises: an intra-assembly connector, which comprises: (a) the means for mounting the array of semiconductor bodies, said means being configured to correspond generally to the array of heat sink elements, said means having a pair of major surfaces on opposite sides, the first surface being adjacent to the array of heat sink elements and the second surface being a base surface, and said means also having a peripheral surface between the first and second opposite surfaces; (b) first connector means, including an array of contacts in the form of terminal pins mounted on said peripheral surface for connecting the chip power contacts or terminals to external power supply means; and (c) second connector means, including an array of contacts at said base surface, for connecting the chip signal contacts to said array of base contacts; and a connector assembly comprising an insulating base having an array of terminals extending therefrom for connection to external signal circuit means and being adapted for mounting adjacent to said base surface of the intra-assembly connector for connecting said base array of signal contacts to the connector assembly terminals.

Claim 36

The assembly of claim 33, wherein the connnector assembly is a printed circuit board terminal assembly.

Claim 37

The assembly of claim 33, wherein the intra-assembly connector is adapted for interconnecting a plurality of semiconductor bodies and comprises: a multi-layer assembly formed in combination by the first and second connector means and comprising individual insulated layers of conductors, sandwiched between power supply voltage reference planes, and vias for selectively connecting the conductors to the semiconductor body contacts.

Claim 38

The interconnect assembly of claim 33, further including means for cooling the array of semiconductor bodies, comprising: an enclosed cooling chamber module mounted to the intra-assembly connector and having a flexible membrane therein adapted for mounting an array of heat sink elements immediately adjacent corresponding semiconductor bodies; each heat sink element comprising a heat sink body having a surface and a fluid cooling passageway immediately adjacent the surface; groups of the heat sink elements being mounted end-to-end by the flexible membrane to provide a continuous path therethrough, and the heat sink elements being mounted by the flexible membrane collectively in a generally planar array which is substantially aligned with the array of semiconductor bodies and individually in an alterable orientation permitting adaptation of the heat sink surface to a corresponding semiconductor body surface; spring means for biasing the individual heat sink elements against the semiconductor body surface, whereby the flexible membrane conforms the orientation of the heat sink surface to the orientation of the corresponding semiconductor body surface; and, fluid inlet and outlet means for directing cooling fluid through the groups of heat sink channels for cooling the semiconductor bodies.

Claim 39

An interconnect assembly for providing external power and signal connections to an array of integrated circuit chips arranged to provide a large number of, and a high density of, terminals, comprising: a plate having apertures therein for mounting said chips in a substantially planar array; a bus plate assembly comprising at least two substantially planar bus plates assembled in mutually insulated fashion along two major faces with the first and second outer major faces, and having apertures corresponding to the locations of the integrated circuit chips; an external assembly comprising an insulated mounting plate and a plurality of terminals extending through the insulated mounting plate for providing electrical connection to external signal circuits; a housing for mounting the bus plate between the chip mounting plate and the connector assembly with the bus plate apertures aligned with the chip mounting plate apertures and with the first major surface of the bus plate assembly facing the chip assembly and the second major surface of the bus plate assembly facing the connector assembly; power supply pins mounted about the periphery of the housing for providing electrical connection to at least first and second power supply levels; at least one chip connector subassembly, each said subassembly being sized and adapted for mounting within an aperture of the bus plate assembly, and comprising: planar insulator plate means supporting an array of flexible insulator springs on each major face thereof corresponding to the chip terminal pattern; a plurality of individual connectors, each providing a feed-through connection through the planar insulated plate to selectively connect chip power and signal terminals on said first side of the bus plate assembly to associated connector assembly terminals on said second major surface of the bus plate assembly and to associated power supply terminals, the individual feed-through connectors being supported at said first and second major surfaces by an associated insulator spring for decreasing the transmission of stress between the feedthrough connectors and the chip terminals and between the feedthrough connectors and the connector assembly terminals as the result of relative movement between the chip plate and the bus plate assembly and the connector assembly; and a metallization pattern formed on said first and second major surfaces of the planar insulator plate selectively connected to a first and a second plurality of the feed-through connectors on either major surface corresponding to the two power supply voltage levels; and at least a pair of patterned flexible conductor plates each overlying a separate one of said first and second bus plate surfaces and each being connected to one of said metallization patterns and associated power supply pins for selectively interconnecting the first and second power supply voltage levels to the associated first and second plurality of feed-through connectors.

Claim 40

An interconnect assembly for providing external power and signal connections to an array of integrated circuit chips arranged to provide a large number of, and a high density of, terminals, comprising: a plate having apertures therein for mounting said chips in a substantially planar array; a bus plate assembly comprising at least two substantially planar bus plates assembled in mutually insulated fashion along two major faces with the first and second outer major faces, and having apertures corresponding to the locations of the integrated circuit chips; an external assembly comprising an insulated mounting plate and a plurality of terminals extending through the insulated mounting plate for providing electrical connection to external signal circuits; a housing for mounting the bus plate between the chip mounting plate and the connector assembly with the bus plate apertures aligned with the chip mounting plate apertures and with the first major surface of the bus plate assembly facing the chip assembly and the second major surface of the bus plate assembly facing the connector assembly; power supply pins mounted about the periphery of the housing for providing electrical connection to at least first and second power supply levels; at least one chip connector subassembly, each said subassembly being sized and adapted for mounting within an aperture of the bus plate assembly, and comprising: planar insulator plate means supporting an array of flexible insulator springs on each major face thereof corresponding to the chip terminal pattern; a plurality of individual connectors, each providing a feed-through connection through the planar insulated plate to selectively connect chip power and signal terminals on said first side of the bus plate assembly to associated connector assembly terminals on said second major surface of the bus plate assembly and to associated power supply terminals, the individual feed-through connectors being supported at said first and second major surfaces by an associated insulator spring for decreasing the transmission of stress between the feedthrough connectors and the chip terminals and between the feedthrough connectors and the connector assembly terminals as the result of relative movement between the chip plate and the bus plate assembly and the connector assembly; and a metallization pattern formed on said first and second major surfaces of the planar insulator plate selectively connected to a first and a second plurality of the feed-through connectors on either major surface corresponding to the two power supply voltage levels; and at least a pair of patterned flexible conductor plates each overlying a separate one of said first and second bus plate surfaces and each being connected to one of said metallization patterns and associated power supply pins for selectively interconnecting the first and second power supply voltage levels to the associated first and second plurality of feed-through connectors.

Claim 41

The interconnect assembly of claim 37, further comprising means for cooling the integrated circuit chip array.

Claim 42

The interconnect assembly of claim 37, wherein the feed-through connectors each comprises a plated-through hole formed through the planar insulated plate means and a first and a second flexible conductor member connected to the opposite ends of the plated-through hole at said first and second major faces thereof.

Claim 43

The interconnect assembly of claim 37 or 39 wherein the chip array is an m×n array and wherein the array of flexible insulator springs comprises an m by n array comprising m cylinders of flexible insulator spring material, each spanning n row locations in the associated column.

Claim 44

The interconnect assembly of claim 37, wherein the planar insulator plate means of the chip connector subassembly comprises first and second plates assembled along two major faces thereof with first and second outer major faces thereof being said first and second major faces of the chip connector subassembly.

Claim 45

The interconnect assembly of claim 41, wherein the first and second plates are insulators.

Claim 46

The interconnect assembly of claim 41, wherein the first and second plates are conductive plates, and wherein the insulator plate means further comprises a layer of insulation formed between the first and second plates.

Claim 47

The interconnect assembly of claim 41, 42 or 43, wherein: the chip array location corresponding to at least one chip plate aperture comprises at least a plurality of separate integrated circuit chips and wherein the feed-through connectors for the chip array location are routed and interconnected internally within the planar insulator plate means for selectively interconnecting the terminals of the separate chips to the associated power or signal connection.

Claim 48

The interconnect assembly of claim 37, wherein: the power supply pins comprise a third group of pins for providing connection to a third external power supply voltage level; the chip interconnect assembly metallization includes a third layer of metallization overlying and insulated from one of the first and second layers of metallization, said third metallization layer being patterned to connect to a third group of feed-through connectors corresponding to the third power supply voltage level; and further comprising a third patterned flexible conductor plate formed over and insulated from an underlying one of the first and second patterned flexible conductor plates and selectively connecting the third group of power supply pins to the metallization for the associated third group of feed-through terminals.

Claim 49

The interconnect assembly of claim 37, wherein: the power supply pins comprise a third and fourth group of pins for providing connection to a third and fourth external power supply voltage level; the chip interconnect assembly metallization is patterned to interconnect a third and fourth group of feed-through connectors corresponding to the third and fourth power supply voltage level; and further comprising a third and fourth patterned flexible conductor plate formed over and insulated from an underlying one of the first and second patterned flexible conductor plates for selectively connecting the third and fourth groups of power supply pins to the metallization for the associated third and fourth group of feed-through terminals.

Claim 50

An interconnect assembly for connecting the terminals of an integrated circuit to external circuits, comprising: a base having top and bottom surfaces and having conductive through-holes extending between the surfaces; an array of terminals mounted on the top surface and to the through-holes and having a generally arcuate configuration extending upward from the base toward and across corresponding integrated circuit chip terminals; an array of resilient insulator members mounted between the base and the associated arcuate terminals for biasing the terminals against the associated integrated circuit chip terminals; and an array of terminals on the bottom side of the base mounted electrically in common with associated through-holes for contacting the integrated circuit chip terminals to external circuits.

Claim 51

An interconnect assembly for connecting the terminals of an integrated circuit to external circuits, comprising: a base having top and bottom surfaces and having conductive through-holes extending between the surfaces; an array of terminals mounted on the top surface and to the through-holes and having a generally arcuate configuration extending upward from the base toward and across corresponding integrated circuit chip terminals; an array of resilient insulator members mounted between the base and the associated arcuate terminals for biasing the terminals against the associated integrated circuit chip terminals; and an array of terminals on the bottom side of the base mounted electrically in common with associated through-holes for contacting the integrated circuit chip terminals to external circuits.

Claim 52

The interconnect assembly of claim 47, wherein the bottom terminal array comprises a second array of arcuate terminals mounted on the base to associated through-holes and resilient insulator members interposed between the base and the associated arcuate terminals.

Claim 53

The interconnect assembly of claim 47 or 48, wherein the array of insulator members comprises one or more unitary members extending across a number of terminal positions.

Claim 54

An interconnect assembly for separately connecting the power and signal terminals of an integrated circuit chip to external power and signal terminals comprising: frame means adapted for supporting at least one integrated circuit chip and supporting a peripheral array of terminals and a separate base array of terminals, both being adapted for connection to external circuits; an interconnect subassembly mounted between the chip position and the base and peripheral arrays of terminals and comprising: a base having conductive vias extending therethrough between first and second opposite sides; a first and second array of flexible terminals formed on the opposite sides and connected to associated vias for selectively interconnecting chip signal terminals to the base array of terminals; and flexible connector means adapted for interconnecting the peripheral array of terminals to selected ones of the flexible terminals to connect the chip power terminals to the peripheral terminals.

Claim 55

An interconnect assembly for separately connecting the power and signal terminals of an integrated circuit chip to external power and signal terminals comprising: frame means adapted for supporting at least one integrated circuit chip and supporting a peripheral array of terminals and a separate base array of terminals, both being adapted for connection to external circuits; an interconnect subassembly mounted between the chip position and the base and peripheral arrays of terminals and comprising: a base having conductive vias extending therethrough between first and second opposite sides; a first and second array of flexible terminals formed on the opposite sides and connected to associated vias for selectively interconnecting chip signal terminals to the base array of terminals; and flexible connector means adapted for interconnecting the peripheral array of terminals to selected ones of the flexible terminals to connect the chip power terminals to the peripheral terminals.

Claim 56

The interconnect assembly of claim 50, wherein the flexible circuit means comprises: first and second layers of metallization formed on the associated first and second sides of the base and connected, respectively, to first and second groups of the chip power terminals; and first and second flexible foil connectors interconnecting, respectively, first and second groups of peripheral signal terminals to the respective first and second metallization layers for applying different power supply voltage levels associated with the first and second groups of peripheral terminals to the respective first and second groups of chip power supply terminals, and to supply the first and second power supply voltages to the first and second metallization layers to form voltage reference planes.

Claim 57

A module for cooling an array of at least one semiconductor body, comprising: an enclosed chamber module having a flexible membrane therein mounting an array of heat sink bodies; each heat sink body comprising a body having a surface and a fluid cooling passageway immediately adjacent the surface; groups of the heat sink bodies being mounted end-to-end by the flexible membrane to provide a continuous path therethrough, and the heat sink bodies being mounted by the flexible membrane collectively in a generally planar array and individually in an alterable orientation permitting adaptation of the heat sink surface to a corresponding underlying semiconductor body surface; spring means for biasing the individual heat sink bodies against the semiconductor body surface, whereby the flexible membrane conforms the orientation of the heat sink surface to the orientation of the corresponding semiconductor body surface; and, fluid inlet and outlet means for directing cooling fluid through the groups of heat sink bodies.

Claim 58

A module for cooling an array of at least one semiconductor body, comprising: an enclosed chamber module having a flexible membrane therein mounting an array of heat sink bodies; each heat sink body comprising a body having a surface and a fluid cooling passageway immediately adjacent the surface; groups of the heat sink bodies being mounted end-to-end by the flexible membrane to provide a continuous path therethrough, and the heat sink bodies being mounted by the flexible membrane collectively in a generally planar array and individually in an alterable orientation permitting adaptation of the heat sink surface to a corresponding underlying semiconductor body surface; spring means for biasing the individual heat sink bodies against the semiconductor body surface, whereby the flexible membrane conforms the orientation of the heat sink surface to the orientation of the corresponding semiconductor body surface; and, fluid inlet and outlet means for directing cooling fluid through the groups of heat sink bodies.

Claim 59

A module for cooling an array of at least one semiconductor body, comprising: an enclosed chamber module having a flexible membrane therein mounting an array of heat sink bodies; each heat sink body comprising a body having a surface and a fluid cooling passageway immediately adjacent the surface; means forming an inner chamber structure having inlet and outlet apertures for separately directing coolant fluid into and out of the individual heat sink bodies; the heat sink bodies being mounted by the flexible membrane collectively in a generally planar array and individually in an alterable orientation permitting adaptation of the heat sink surface to a corresponding underlying semiconductor body surface; spring means for biasing the individual heat sink bodies against the semiconductor body surface, whereby the flexible membrane conforms the orientation of the heat sink surface to the orientation of the corresponding semiconductor body surface; and, fluid inlet and outlet means for directing cooling fluid into and out of the inner chamber structure.

Claim 60

A module for cooling an array of at least one semiconductor body, comprising: an enclosed chamber module having a flexible membrane therein mounting an array of heat sink bodies; each heat sink body comprising a body having a surface and a fluid cooling passageway immediately adjacent the surface; means forming an inner chamber structure having inlet and outlet apertures for separately directing coolant fluid into and out of the individual heat sink bodies; the heat sink bodies being mounted by the flexible membrane collectively in a generally planar array and individually in an alterable orientation permitting adaptation of the heat sink surface to a corresponding underlying semiconductor body surface; spring means for biasing the individual heat sink bodies against the semiconductor body surface, whereby the flexible membrane conforms the orientation of the heat sink surface to the orientation of the corresponding semiconductor body surface; and, fluid inlet and outlet means for directing cooling fluid into and out of the inner chamber structure.