US5748855A
Expired / Lapsed
US
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Method and system for performance monitoring of misaligned memory accesses in a processing system
Assignee: International Business Machines Corp
•
Filing: 1995-10-02
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Granted: 1998-05-05
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Expires: 2015-10-02
Abstract
Abstract A method and system for monitoring performance of a processing system, the processing system including a plurality of performance monitor counters (PMCs) and at least one monitor mode control register (MMCR) to configure the operations of at least one of the PMCs, includes identifying misaligned data items, and determining a performance penalty of misaligned data accesses during a predetermined sampling period.
Inventors
- 👤 Frank Eliot Levine
- 👤 Charles Philip Roth
- 👤 Edward Hugh Welbon
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 23:17
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/30; G06F11/34; G06F11/3409; G06F11/3466; G06F11/348; G06F11/3419; G06F2201/00; G06F2201/86; G06F2201/88; G06F2201/885
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
137 words
A method for monitoring performance of a processing system, the processing system including at least one performance monitor counter (PMC) and at least one monitor mode control register (MMCR) to configure the operations of the at least one PMC, the method comprising: (a) identifying misaligned data items: and (b) determining a performance penalty due to misaligned data accesses during a predetermined sampling period, wherein step (b) further comprises: (b1) determining a first difference value between the number of cycles required for misaligned loads and for aligned loads; (b2) determining a second difference between a number of cycles required for misaligned stores and for aligned stores; (b3) identifying the performance penalty as a combination of the first difference value for the counted number of misaligned loads and the second difference value for the counted number of misaligned stores.
Claim 2
Independent Claim
137 words
A method for monitoring performance of a processing system, the processing system including at least one performance monitor counter (PMC) and at least one monitor mode control register (MMCR) to configure the operations of the at least one PMC, the method comprising: (a) identifying misaligned data items: and (b) determining a performance penalty due to misaligned data accesses during a predetermined sampling period, wherein step (b) further comprises: (b1) determining a first difference value between the number of cycles required for misaligned loads and for aligned loads; (b2) determining a second difference between a number of cycles required for misaligned stores and for aligned stores; (b3) identifying the performance penalty as a combination of the first difference value for the counted number of misaligned loads and the second difference value for the counted number of misaligned stores.
Claim 3
Dependent Claim
26 words
The method of claim 1 further comprising: (c) altering at least one component of code to reduce the number of misaligned accesses to improve system performance.
Claim 4
Dependent Claim
31 words
The method of claim 1 further comprising: (c) altering at least one hardware component of the processing system to reduce the time required to access misaligned data to improve system performance.
Claim 5
Dependent Claim
22 words
The method of claim 1 wherein step (b) further comprises: counting a number of misaligned load operations during the predetermined sampling period.
Claim 6
Dependent Claim
33 words
The method of claim 4 wherein the step of counting further comprises: counting a number of misaligned load operations that are cache hits for first and second accesses during the predetermined sampling period.
Claim 7
Dependent Claim
22 words
The method of claim 1 wherein step (b2) further comprises: counting a number of misaligned store operations during the predetermined sampling period.
Claim 8
Dependent Claim
33 words
The method of claim 6 wherein the step of counting further comprises: counting a number of misaligned store operations that are cache hits for first and second accesses during the predetermined sampling period.
Claim 9
Independent Claim
140 words
A system for monitoring performance of a processing system, the processing system including at least one performance monitor counter (PMC) and at least one monitor mode control register (MMCR) to configure the operations of the at least one PMC, the system comprising a circuit for identifying misaligned data items: and for determining a performance penalty of misaligned data accesses during a predetermined sampling period, in which the circuit further provides for determining a first difference value between the number of cycles required for misaligned loads and for aligned loads; for determining a second difference between a number of cycles required for misaligned stores and for aligned stores; and for identifying the performance penalty as a combination of the first difference value for the counted number of misaligned loads and the second difference value for the counted number of misaligned stores.
Claim 10
Independent Claim
140 words
A system for monitoring performance of a processing system, the processing system including at least one performance monitor counter (PMC) and at least one monitor mode control register (MMCR) to configure the operations of the at least one PMC, the system comprising a circuit for identifying misaligned data items: and for determining a performance penalty of misaligned data accesses during a predetermined sampling period, in which the circuit further provides for determining a first difference value between the number of cycles required for misaligned loads and for aligned loads; for determining a second difference between a number of cycles required for misaligned stores and for aligned stores; and for identifying the performance penalty as a combination of the first difference value for the counted number of misaligned loads and the second difference value for the counted number of misaligned stores.
Claim 11
Dependent Claim
30 words
The system of claim 8 in which the circuit further provides for altering at least one component of code to reduce the number of misaligned accesses to improve system performance.
Claim 12
Dependent Claim
36 words
The system of claim 8 in which the circuit further provides for altering at least one hardware component of the processing system to reduce the time spent required to access misaligned data to improve system performance.
Claim 13
Dependent Claim
24 words
The system of claim 8 in which the circuit further provides for counting a number of misaligned load operations during the predetermined sampling period.
Claim 14
Dependent Claim
33 words
The system of claim 11 in which the circuit further provides for counting a number of misaligned load operations that are cache hits for first and second accesses during the predetermined sampling period.
Claim 15
Dependent Claim
24 words
The system of claim 8 in which the circuit further provides for counting a number of misaligned store operations during the predetermined sampling period.
Claim 16
Dependent Claim
33 words
The system of claim 13 in which the circuit further provides for counting a number of misaligned store operations that are cache hits for first and second accesses during the predetermined sampling period.
Claim 17
Dependent Claim
153 words
A computer readable medium containing program instructions for monitoring performance of a processing system, the processing system including at least one performance monitor counter (PMC) and at least one monitor mode control register (MMCR) to configure the operations of the at least one PMC, the instructions comprising: (a) identifying misaligned data items stored in memory of the processing system; and (b) determining a performance penalty due to misaligned data accesses in the processing system during a predetermined sampling period wherein step (b) further comprises: (b1) determining a first difference value between the number of cycles required for misaligned loads and for aligned loads: (b2) determining a second difference between a number of cycles required for misaligned stores and for aligned stores: (b3) identifying the performance penalty as a combination of the first difference value for the counted number of misaligned loads and the second difference value for the counted number of misaligned stores.
Claim 18
Dependent Claim
153 words
A computer readable medium containing program instructions for monitoring performance of a processing system, the processing system including at least one performance monitor counter (PMC) and at least one monitor mode control register (MMCR) to configure the operations of the at least one PMC, the instructions comprising: (a) identifying misaligned data items stored in memory of the processing system; and (b) determining a performance penalty due to misaligned data accesses in the processing system during a predetermined sampling period wherein step (b) further comprises: (b1) determining a first difference value between the number of cycles required for misaligned loads and for aligned loads: (b2) determining a second difference between a number of cycles required for misaligned stores and for aligned stores: (b3) identifying the performance penalty as a combination of the first difference value for the counted number of misaligned loads and the second difference value for the counted number of misaligned stores.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-05-04 | 2001-11-03 | 2002-05-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-05-04 | 2005-11-03 | 2006-05-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-05-04 | 2009-11-03 | 2010-05-05 | $7700.00 | Window Closed / Lapsed |