Patent US5670805A successfully refreshed from Google Patents.
US5670805A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Controlled recrystallization of buried strap in a semiconductor memory device
Assignee: Infineon Technologies AG
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Filing: 1996-05-07
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Granted: 1997-09-23
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Expires: 2016-05-07
Abstract
Abstract A semiconductor memory device includes a trench formed in a semiconductor substrate. Conductive material is formed in the trench and is insulatively spaced from the semiconductor substrate to form a capacitor. A transfer gate transistor includes source/drain regions formed on a surface of the semiconductor substrate and a control gate which is insulatively spaced from a channel region between the source and drain regions. A buried strap electrically connects the capacitor to one of the source/drain regions of the transfer gate transistor. A portion of the buried strap includes recrystallized silicon.
Inventors
- 👤 Erwin Hammerl
- 👤 Jack A. Mandelman
- 👤 Herbert L. Ho
- 👤 Junichi Shiozawa
- 👤 Reinhard Johannes Stengl
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 16:38
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/038
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
88 words
A semiconductor memory device, comprising: a semiconductor substrate; a trench formed in said semiconductor substrate; conductive material formed in said trench and insulatively spaced from semiconductor substrate to form a capacitor; a transfer gate transistor including source/drain regions formed on a surface of said semiconductor substrate and a control gate insulatively spaced from a channel region between said source/drain regions; and a buried strap electrically connecting said capacitor to one of said source/drain regions of said transfer gate transistor, a portion of said buried strap comprising recrystallized silicon.
Claim 2
Dependent Claim
88 words
A semiconductor memory device, comprising: a semiconductor substrate; a trench formed in said semiconductor substrate; conductive material formed in said trench and insulatively spaced from semiconductor substrate to form a capacitor; a transfer gate transistor including source/drain regions formed on a surface of said semiconductor substrate and a control gate insulatively spaced from a channel region between said source/drain regions; and a buried strap electrically connecting said capacitor to one of said source/drain regions of said transfer gate transistor, a portion of said buried strap comprising recrystallized silicon.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-09-22 | 2001-03-24 | 2001-09-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-09-22 | 2005-03-24 | 2005-09-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-09-22 | 2009-03-24 | 2009-09-23 | $7700.00 | Window Closed / Lapsed |