Boron out-diffused surface strap process

Claim 1

A method for electrically connecting a first silicon area to a second silicon area, said first and said second silicon areas each having an exposed surface and being separated by a dielectric, said dielectric also having an exposed surface, which method comprises the steps of: (a) doping said exposed surface of said first silicon area and said exposed surface of said second silicon area; (b) depositing a continuous diffusion barrier layer over said surface of said first silicon area, said surface of said second silicon area, and said surface of said dielectric; (c) etching said diffusion barrier layer so as to selectively remove portions of said diffusion barrier layer and thereby expose underlying surfaces; (d) depositing a continuous layer of polysilicon over said diffusion barrier layer and also over said exposed underlying surfaces; (e) diffusing said dopant from said first silicon area and said second silicon area into said continuous layer of polysilicon, wherein unremoved portions of said diffusion barrier layer prevent diffusion of said dopant into said continuous layer of polysilicon overlying said unremoved portions of said diffusion barrier layer; (f) etching the resulting structure so as to selectively remove said continuous layer of polysilicon containing no diffused dopant, thereby leaving said continuous layer of polysilicon deposited over said exposed underlying surfaces; and (g) etching the then-resulting structure so as to remove any remaining diffusion barrier layer, a remaining portion of said continuous layer of polysilicon forming said electrical connection between said first silicon region and said second silicon region.

Claim 2

A method for electrically connecting a first silicon area to a second silicon area, said first and said second silicon areas each having an exposed surface and being separated by a dielectric, said dielectric also having an exposed surface, which method comprises the steps of: (a) doping said exposed surface of said first silicon area and said exposed surface of said second silicon area; (b) depositing a continuous diffusion barrier layer over said surface of said first silicon area, said surface of said second silicon area, and said surface of said dielectric; (c) etching said diffusion barrier layer so as to selectively remove portions of said diffusion barrier layer and thereby expose underlying surfaces; (d) depositing a continuous layer of polysilicon over said diffusion barrier layer and also over said exposed underlying surfaces; (e) diffusing said dopant from said first silicon area and said second silicon area into said continuous layer of polysilicon, wherein unremoved portions of said diffusion barrier layer prevent diffusion of said dopant into said continuous layer of polysilicon overlying said unremoved portions of said diffusion barrier layer; (f) etching the resulting structure so as to selectively remove said continuous layer of polysilicon containing no diffused dopant, thereby leaving said continuous layer of polysilicon deposited over said exposed underlying surfaces; and (g) etching the then-resulting structure so as to remove any remaining diffusion barrier layer, a remaining portion of said continuous layer of polysilicon forming said electrical connection between said first silicon region and said second silicon region.