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US4502894A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of fabricating polycrystalline silicon resistors in integrated circuit structures using outdiffusion

Assignee: National Semiconductor Corp
•
Filing: 1983-08-12
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Granted: 1985-03-05
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Expires: 2003-08-12
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Abstract

Abstract A process of fabricating a polycrystalline silicon resistor on a semiconductor structure is disclosed. According to the process insulating material is fabricated over selected regions of the semiconductor structure 10, and selected impurity 18 introduced into the insulating material, typically in conjunction with other process operations useful in fabricating semiconductor structures. Undoped regions of polycrystalline silicon 21 are then formed on the surface of the insulating material 15 and the entire structure is treated to cause the dopant in the insulating material 15 to out diffuse into the undoped polycrystalline silicon to thereby create resistors. The treating operation is typically the heat treatment performed in conjunction with other process operations in the fabrication of integrated circuits. In one embodiment the introduction of impurities into the insulating material places the impurities at a depth such that no out diffusion will occur at the selected process parameters except where the field oxide has been selectively thinned using an etching or other known process.

Inventors

  • 👤 John Y. W. Seto
  • 👤 Ken K. Y. Su

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 23:45
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/40; H10D1/47; H10P; H10P30/00; H10P30/40; H10P32/00; H10P32/20; H10P32/30; H10P32/302

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 123 words
A method of fabricating a polycrystalline silicon resistor in a semiconductor structure while doping first regions in the semiconductor structure comprising: fabricating insulating material of first thickness over the first regions and of second greater thickness over second regions of the semiconductor structure; introducing at least one desired conductivity type dopant into the insulating material at the second regions, and at the same time through the insulating material into the semiconductor structure at the first regions; forming regions of undoped polycrystalline silicon on the insulating material of second greater thickness; and treating the semiconductor structure, including the regions of undoped polycrystalline silicon, to cause the dopant in the insulating material to diffuse into the polycrystalline silicon to thereby fabricate a polycrystalline silicon resistor.
Claim 2
Independent Claim 123 words
A method of fabricating a polycrystalline silicon resistor in a semiconductor structure while doping first regions in the semiconductor structure comprising: fabricating insulating material of first thickness over the first regions and of second greater thickness over second regions of the semiconductor structure; introducing at least one desired conductivity type dopant into the insulating material at the second regions, and at the same time through the insulating material into the semiconductor structure at the first regions; forming regions of undoped polycrystalline silicon on the insulating material of second greater thickness; and treating the semiconductor structure, including the regions of undoped polycrystalline silicon, to cause the dopant in the insulating material to diffuse into the polycrystalline silicon to thereby fabricate a polycrystalline silicon resistor.
Claim 3
Dependent Claim 19 words
A method as in claim 1 wherein step of treating comprises heating the semiconductor structure including the polycrystalline silicon.
Claim 4
Dependent Claim 22 words
A method as in claim 2 wherein the step of introducing at least one desired conductivity type dopant comprises implanting the dopant.
Claim 5
Dependent Claim 26 words
A method as in claim 3 wherein the step of fabricating insulating material over selected regions of the semiconductor structure comprises oxidizing the underlying semiconductor structure.
Claim 6
Dependent Claim 27 words
A method as in claim 3 wherein the step of implanting comprises implanting at least one material selected from the group of boron, arsenic, phosphorous, or antimony.
Claim 7
Dependent Claim 34 words
A method as in claim 1 wherein following the step of introducing at least one desired conductivity type dopant into the insulating material, the step of removing some of the insulating material is performed.
Claim 8
Dependent Claim 26 words
A method as in claim 6 wherein the step of removing some of the insulating material precedes the step of forming regions of undoped polycrystalline silicon.
Claim 9
Dependent Claim 39 words
A method as in claim 6 wherein during the step of treating the semiconductor structure only those impurities in regions of the insulating material beneath regions of the insulating material which have been removed diffuse into the polycrystalline silicon.

References Cited (Backward Citations)

US3892608A Cited
US4214917A Cited
US4239559A Cited
US4408385A Cited
US4335505A Cited
US4351099A Cited
US4391032A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-03-04 1988-09-03 1989-03-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-03-04 1992-09-03 1993-03-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-03-04 1996-09-03 1997-03-05 $7700.00 Window Closed / Lapsed

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