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US5655290A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for making a three-dimensional multichip module

Assignee: Fujitsu Ltd
•
Filing: 1995-01-30
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Granted: 1997-08-12
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Expires: 2015-01-30
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Abstract

Abstract A three dimensional module for housing a plurality of integrated circuit chips is shown. The IC chips are mounted in rows on a plurality of substrates. Parallel to each row are communications bars which provide signal paths allowing chips on one substrate to communicate with those on another substrate. The communications bars also serve as spacers between substrates, thereby forming cooling channels. The IC chips are disposed in the cooling channels so that they come into direct contact with the cooling fluid. Signal lines to and from the IC chips are kept as separated as possible from the power lines so as to minimize noise. To this end, relatively thick power supply straps are mounted to each substrate below each row of IC chips. The power supply straps are, in turn, connected to power feed straps such that a very low impedance power supply path to the IC chips is maintained. The overall design of the three dimensional structure of the present invention is highly modular to facilitate high yield fabrication and repair.

Inventors

  • 👤 Larry L. Moresco
  • 👤 David A. Horine
  • 👤 Wen-chou Vincent Wang

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 11:35
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/67; H10W70/688; H05; H05K; H05K1/00; H05K1/02; H05K1/14; H05K1/144; H10W40/00; H10W40/40; H10W40/47; H10W44/00; H10W44/20; H10W70/01; H10W70/05; H10W70/095; H10W70/611; H10W70/62; H10W70/63; H10W70/635; H10W70/65; H10W90/00; H10W90/401; H10W72/00; H10W72/071; H10W72/072; H10W72/07251; H10W72/20; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49126

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 132 words
A method of making a three-dimensional multichip module comprising: providing a plurality of separately fabricated multilayered major substrates having generally planar major surfaces and a plurality of integrated circuit chips mounted in rows thereon, said integrated circuit chips being electrically coupled to signal lines embedded within said major substrates, removably mounting a plurality of separately fabricated communication bars on one of said major surfaces of one of said major substrates, such that said communication bars serve as spacers between adjacent major substrates, and further act as electrical paths for communicating electrical signals between adjacent major substrates, removably mounting at least one separately fabricated power supply strap capable of supplying multiple electrical potentials to each said major substrate, and removably mounting at least one communication bar between two rows of integrated circuit chips.
Claim 2
Independent Claim 132 words
A method of making a three-dimensional multichip module comprising: providing a plurality of separately fabricated multilayered major substrates having generally planar major surfaces and a plurality of integrated circuit chips mounted in rows thereon, said integrated circuit chips being electrically coupled to signal lines embedded within said major substrates, removably mounting a plurality of separately fabricated communication bars on one of said major surfaces of one of said major substrates, such that said communication bars serve as spacers between adjacent major substrates, and further act as electrical paths for communicating electrical signals between adjacent major substrates, removably mounting at least one separately fabricated power supply strap capable of supplying multiple electrical potentials to each said major substrate, and removably mounting at least one communication bar between two rows of integrated circuit chips.
Claim 3
Dependent Claim 34 words
The method of claim 1 further comprising the step of mounting a plurality of separately fabricated intermediate substrates on said major substrates and mounting said plurality of integrated circuit chips on said intermediate substrates.
Claim 4
Dependent Claim 24 words
The method of claim 1 further comprising the step of removably mounting at least one communication bar having a plurality of connectors imbedded therein.
Claim 5
Independent Claim 145 words
A method of making a three-dimensional multichip module comprising: providing a plurality of separately fabricated multilayered major substrates having generally planar major surfaces and a plurality of integrated circuit chips mounted in rows thereon, said integrated circuit chips being electrically coupled to signal lines embedded within said major substrates, removably mounting a plurality of separately fabricated communication bars on one of said major surfaces of one of said major substrates, such that said communication bars serve as spacers between adjacent major substrates, and further act as electrical paths for communicating electrical signals between adjacent major substrates, removably mounting at least one separately fabricated power supply strap capable of supplying multiple electrical potentials to each said major substrate, and providing at least one major substrate comprising a rigid substrate and an active interconnect substrate formed thereover, said active interconnect substrate comprising a plurality of metal layers.
Claim 6
Independent Claim 145 words
A method of making a three-dimensional multichip module comprising: providing a plurality of separately fabricated multilayered major substrates having generally planar major surfaces and a plurality of integrated circuit chips mounted in rows thereon, said integrated circuit chips being electrically coupled to signal lines embedded within said major substrates, removably mounting a plurality of separately fabricated communication bars on one of said major surfaces of one of said major substrates, such that said communication bars serve as spacers between adjacent major substrates, and further act as electrical paths for communicating electrical signals between adjacent major substrates, removably mounting at least one separately fabricated power supply strap capable of supplying multiple electrical potentials to each said major substrate, and providing at least one major substrate comprising a rigid substrate and an active interconnect substrate formed thereover, said active interconnect substrate comprising a plurality of metal layers.
Claim 7
Dependent Claim 34 words
The method of claim 4 further comprising the step of mounting a plurality of separately fabricated intermediate substrates on said major substrates and mounting said plurality of integrated circuit chips on said intermediate substrates.
Claim 8
Dependent Claim 24 words
The method of claim 4 further comprising the step of removably mounting at least one communication bar between two rows of integrated circuit chips.
Claim 9
Dependent Claim 24 words
The method of claim 4 further comprising the step of removably mounting at least one communication bar having a plurality of connectors imbedded therein.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-08-11 2001-02-10 2001-08-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-08-11 2005-02-10 2005-08-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-08-11 2009-02-10 2009-08-12 $7700.00 Window Closed / Lapsed

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