System for starting and completing a data transfer for a subsequently received autotransfer command after receiving a first SCSI data transfer command that is not autotransfer

Claim 3

The method of claim 1, wherein said SCSI target device further comprises a buffer memory and said buffer memory is not part of said disk controller integrated circuit.

Claim 4

The method of claim 1, wherein said SCSI target device further comprises a buffer memory and said buffer memory is part of said disk controller integrated circuit.

Claim 5

The method of claim 1, wherein said second SCSI data transfer command further comprises transfer length information indicative of a number of blocks of data, said method further comprising the step of: incrementing a transfer counter of said disk controller integrated circuit once for each block transferred of said number of blocks of data.

Claim 6

The method of claim 1, wherein said second SCSI data transfer command further comprises transfer length information indicative of a number of blocks of data, said method further comprising the step of: decrementing a transfer counter of said disk controller integrated circuit one for each block transferred of said number of blocks of data.

Claim 7

The method of claim 5, further comprising the step of: loading said transfer counter with said transfer length information prior to said decrementing.

Claim 8

The method of claim 1, wherein said determining step (e) involves reading an autotransfer enable bit from a register, said autotransfer enable bit being writable by said processor.

Claim 9

The method of claim 1, wherein said receiving step (a) involves loading information from said SCSI write command into a first-in-first-out memory of said disk controller integrated circuit, and wherein said determining step (e) involves decoding said information stored in said first-in-first-out memory.

Claim 10

A structure, comprising: a processor; and a disk controller integrated circuit comprising processor interface circuitry, SCSI bus interface circuitry including means for determining whether a SCSI data transfer command is an autotransfer command, and a sequencer, said processor being coupled to said disk controller integrated circuit via said processor interface circuitry, said disk controller integrated circuit being coupled to a SCSI bus via said SCSI bus interface circuitry, said disk controller integrated circuit receiving a first data transfer command from said SCSI bus, disconnecting from said SCSI bus upon determining that said first SCSI data transfer command is not an autotransfer command, receiving a second data transfer command during execution of said first data transfer command in a command phase and transferring data from said SCSI bus in a data transfer phase of said second data transfer command without waiting for a communication from said processor, and reconnecting to said SCSI bus following completion of said second data transfer command.

Claim 11

A structure, comprising: a processor; and a disk controller integrated circuit comprising processor interface circuitry, SCSI bus interface circuitry including means for determining whether a SCSI data transfer command is an autotransfer command, and a sequencer, said processor being coupled to said disk controller integrated circuit via said processor interface circuitry, said disk controller integrated circuit being coupled to a SCSI bus via said SCSI bus interface circuitry, said disk controller integrated circuit receiving a first data transfer command from said SCSI bus, disconnecting from said SCSI bus upon determining that said first SCSI data transfer command is not an autotransfer command, receiving a second data transfer command during execution of said first data transfer command in a command phase and transferring data from said SCSI bus in a data transfer phase of said second data transfer command without waiting for a communication from said processor, and reconnecting to said SCSI bus following completion of said second data transfer command.

Claim 12

The structure of claim 9, wherein said second SCSI data transfer command comprises transfer length information, and wherein said disk controller integrated circuit further comprises: a transfer counter which is preloaded with said transfer length information and which is decremented during said transferring of data.

Claim 13

A disk drive device coupled to a SCSI bus, comprising: a processor; and a disk controller integrated circuit, said disk controller integrated circuit comprising: a sequencer; and a memory containing a plurality of instructions executable by said sequencer, at least one of said instructions having a branch condition, said sequencer determining whether a second SCSI data transfer command is received during execution of a first data transfer command and causing said SCSI bus to transition from a command bus phase to a data transfer bus phase without waiting for a communication from said processor when said branch condition is true.

Claim 14

A disk drive device coupled to a SCSI bus, comprising: a processor; and a disk controller integrated circuit, said disk controller integrated circuit comprising: a sequencer; and a memory containing a plurality of instructions executable by said sequencer, at least one of said instructions having a branch condition, said sequencer determining whether a second SCSI data transfer command is received during execution of a first data transfer command and causing said SCSI bus to transition from a command bus phase to a data transfer bus phase without waiting for a communication from said processor when said branch condition is true.

Claim 15

The disk drive device of claim 11, wherein said branch condition is true if said second SCSI data transfer command is an autotransfer command, said branch condition being false if said second SCSI data transfer command is not an autotransfer command.

Claim 16

The disk drive device of claim 12, wherein said disk controller integrated circuit generates an interrupt signal to said processor after receiving said second SCSI data transfer command.

Claim 17

The disk drive device of claim 12, wherein said disk controller integrated circuit generates an interrupt signal to said processor upon completion of said second SCSI data transfer command.

Claim 18

A disk controller integrated circuit for coupling to a processor of a SCSI peripheral device, said disk controller integrated circuit comprising: a sequencer instruction memory; means for sequencing through a sequence of sequencer instructions in said sequencer instruction memory; means for parsing information from fields of a SCSI command descriptor block and for storing said information into predetermined memory locations in said disk controller integrated circuit, said command descriptor block being part of a SCSI command received from a SCSI bus, said means for parsing being a dedicated state machine; means for storing into said disk controller integrated circuit initiator identification information of said SCSI command, for disconnecting from said SCSI bus, and for outputting said initiator identification information from said disk controller integrated circuit onto said SCSI bus when reconnecting to said SCSI bus; means for determining whether said SCSI command is an autotransfer command, for storing initiator identification information into said disk controller integrated circuit if said SCSI command is determined by said disk controller integrated circuit to be an autotransfer command, and for generating two interrupts to said processor during receipt and execution of said autotransfer command, one of said two interrupts being generated after said SCSI command is received onto said disk controller integrated circuit but before a data transfer bus phase is initiated, another of said two interrupts being generated upon completion of said SCSI command; means for determining whether said SCSI command is a type of an autotransfer command by comparing logical block address information of said SCSI command with logical block address information stored by said processor into said disk controller integrated circuit; means for counting a number of blocks transferred during said data transfer bus phase of said SCSI command, and means for determining whether a second SCSI data transfer command is received during execution of a first SCSI data transfer command.

Claim 19

A disk controller integrated circuit for coupling to a processor of a SCSI peripheral device, said disk controller integrated circuit comprising: a sequencer instruction memory; means for sequencing through a sequence of sequencer instructions in said sequencer instruction memory; means for parsing information from fields of a SCSI command descriptor block and for storing said information into predetermined memory locations in said disk controller integrated circuit, said command descriptor block being part of a SCSI command received from a SCSI bus, said means for parsing being a dedicated state machine; means for storing into said disk controller integrated circuit initiator identification information of said SCSI command, for disconnecting from said SCSI bus, and for outputting said initiator identification information from said disk controller integrated circuit onto said SCSI bus when reconnecting to said SCSI bus; means for determining whether said SCSI command is an autotransfer command, for storing initiator identification information into said disk controller integrated circuit if said SCSI command is determined by said disk controller integrated circuit to be an autotransfer command, and for generating two interrupts to said processor during receipt and execution of said autotransfer command, one of said two interrupts being generated after said SCSI command is received onto said disk controller integrated circuit but before a data transfer bus phase is initiated, another of said two interrupts being generated upon completion of said SCSI command; means for determining whether said SCSI command is a type of an autotransfer command by comparing logical block address information of said SCSI command with logical block address information stored by said processor into said disk controller integrated circuit; means for counting a number of blocks transferred during said data transfer bus phase of said SCSI command, and means for determining whether a second SCSI data transfer command is received during execution of a first SCSI data transfer command.