Patent US5576242A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5576242A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of forming self-aligned buried contact

Assignee: United Microelectronics Corp
•
Filing: 1995-12-15
•
Granted: 1996-11-19
•
Expires: 2015-12-15
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract Disclosed is a method of forming self-aligned buried contact implementing self-alignment technology into buried contact process to prevent failure of semiconductor elements due to disconnection of wiring which is caused by misalignment. This is done by forming a sidewall spacer in the recess on the buried contact region. The tolerance of misalignment is greatly increased because a polysilicon layer will contact with the buried contact region if the polysilicon layer could contact the sidewall spacer.

Inventors

  • 👤 Ming-Hua Liu

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 23:52
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/011

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 93 words
A process for forming self-aligned buried contact on a semiconductor substrate having a field oxide and a gate oxide grown thereon and a first polysilicon layer deposited thereon and a buried contact region formed thereon by etching, comprising the following steps of: depositing a second polysilicon layer thereon while forming a recess on the buried contact region; forming a sidewall spacer within said recess; depositing a tungsten silicate layer thereon; depositing and defining a second photoresist thereon; anisotropically etching said tungsten silicate layer and said second polysilicon layer; and removing said second photoresist.
Claim 2
Dependent Claim 93 words
A process for forming self-aligned buried contact on a semiconductor substrate having a field oxide and a gate oxide grown thereon and a first polysilicon layer deposited thereon and a buried contact region formed thereon by etching, comprising the following steps of: depositing a second polysilicon layer thereon while forming a recess on the buried contact region; forming a sidewall spacer within said recess; depositing a tungsten silicate layer thereon; depositing and defining a second photoresist thereon; anisotropically etching said tungsten silicate layer and said second polysilicon layer; and removing said second photoresist.
Claim 3
Dependent Claim 38 words
A process for forming self-aligned buried contact on a semiconductor substrate as claimed in claim 1, wherein impurities are implanted and driven in after depositing said second polysilicon layer to improve the conductivity of said second polysilicon layer.
Claim 4
Dependent Claim 34 words
A process for forming self-aligned buried contact on a semiconductor substrate as claimed in claim 1, wherein said step of forming the sidewall spacer includes depositing a silicon dioxide layer thereon and etching back.
Claim 5
Dependent Claim 30 words
A process for forming self-aligned buried contact on a semiconductor substrate as claimed in claim 3, wherein the thickness of said silicon dioxide layer is 1 KÅ to 1.5 KÅ.
Claim 6
Dependent Claim 34 words
A process for forming self-aligned buried contact on a semiconductor substrate as claimed in claim 1, wherein said step of forming the sidewall spacer includes depositing a silicon nitride layer thereon and etching back.
Claim 7
Dependent Claim 30 words
A process for forming self-aligned buried contact on a semiconductor substrate as claimed in claim 5, wherein the thickness of said silicon nitride layer is 1 KÅ to 1.5 KÅ.
Claim 8
Dependent Claim 80 words
A process for forming self-aligned buried contact on a semiconductor substrate having field oxide and gate oxide grown thereon and a first polysilicon layer deposited thereon and a buried contact region formed thereon by etching, comprising the following steps of: depositing a second polysilicon layer thereon while forming a recess on the buried contact region; forming a sidewall spacer within said recess; depositing and defining a second photoresist thereon; anisotropically etching said second polysilicon layer; and removing said second photoresist.
Claim 9
Dependent Claim 80 words
A process for forming self-aligned buried contact on a semiconductor substrate having field oxide and gate oxide grown thereon and a first polysilicon layer deposited thereon and a buried contact region formed thereon by etching, comprising the following steps of: depositing a second polysilicon layer thereon while forming a recess on the buried contact region; forming a sidewall spacer within said recess; depositing and defining a second photoresist thereon; anisotropically etching said second polysilicon layer; and removing said second photoresist.
Claim 10
Dependent Claim 34 words
A process for forming self-aligned buried contact on a semiconductor substrate as claimed in claim 7, wherein said step of forming the sidewall spacer includes depositing a silicon dioxide layer thereon and etching back.
Claim 11
Dependent Claim 30 words
A process for forming self-aligned buried contact on a semiconductor substrate as claimed in claim 8, wherein the thickness of said silicon dioxide layer is 1 KÅ to 1.5 KÅ.
Claim 12
Dependent Claim 34 words
A process for forming self-aligned buried contact on a semiconductor substrate as claimed in claim 7, wherein said step of forming the sidewall spacer includes depositing a silicon nitride layer thereon and etching back.
Claim 13
Dependent Claim 30 words
A process for forming self-aligned buried contact on a semiconductor substrate as claimed in claim 10, wherein the thickness of said silicon nitride layer is 1 KÅ to 1.5 KÅ.

References Cited (Backward Citations)

US4656732A Cited
US5236867A Cited
US4910168A Cited
US5318925A Cited
US5427980A Cited
US5494848A Cited
US5525552A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-11-19 2000-05-20 2000-11-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-11-19 2004-05-20 2004-11-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-11-19 2008-05-20 2008-11-19 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag