← Back to Patent Explorer
US5494848A Expired / Lapsed US ⏱️ 0.0 years remaining

Buried contact trench process

Assignee: Taiwan Semiconductor Manufacturing Co TSMC Ltd
•
Filing: 1995-03-17
•
Granted: 1996-02-27
•
Expires: 2015-03-17
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A new method of forming improved buried contact junctions is described. A layer of gate silicon oxide and a first polysilicon layer are provided overlying the surface of a semiconductor substrate. The first polysilicon and gate silicon oxide layers are etched away where they are not covered by a buried contact mask to provide an opening to the semiconductor substrate. A second layer of polysilicon is deposited over the first polysilicon layer and within the opening. The second polysilicon layer is doped with dopant which is driven in to form a buried contact junction within the semiconductor substrate under the opening. A layer of silicon oxide is deposited overlying the second polysilicon layer. The oxide and second polysilicon layers are patterned to form a polysilicon contact overlying the buried contact junction wherein the mask used for the patterning is misaligned and wherein a portion of the buried contact junction is exposed and wherein a portion of the first polysilicon layer remains as residue. A photoresist mask is formed covering the polysilicon contact and extending on either side of the polysilicon contact so that the exposed portion of the buried contact junction is covered by the photoresist mask. The first polysilicon layer residue is etched away wherein the photoresist mask protects the exposed portion of the buried contact junction from the etching completing the formation of a buried contact in the fabrication of an integrated circuit.

Inventors

  • 👤 Hsien W. Chin

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 02:36
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/021

Claims Analysis

Total Claims: 33
Claim 1
Independent Claim 259 words
A method of forming a buried contact in a semiconductor substrate in the fabrication of an integrated circuit comprising: providing a layer of gate silicon oxide over the surface of said semiconductor substrate; depositing a first polysilicon layer overlying said gate silicon oxide layer; etching away said first polysilicon and said gate silicon oxide layers where they are not covered by a buried contact mask to provide an opening to said semiconductor substrate; depositing a second layer of polysilicon over said first polysilicon layer and over said semiconductor substrate within said opening; doping said second polysilicon layer with dopant; driving in said dopant to form a buried contact junction within said semiconductor substrate under said opening; depositing a second layer of silicon oxide overlying said second polysilicon layer; patterning said second oxide and said first and second polysilicon layers to form a polysilicon contact overlying said buried contact junction wherein a portion of said buried contact within said semiconductor substrate is exposed and wherein a portion of said first polysilicon layer other than that of the contact remains as residue; forming a photoresist mask covering said polysilicon contact and extending on either side of said polysilicon contact so that the exposed portion of said buried contact junction within said semiconductor substrate is covered by said photoresist mask; and etching away said first polysilicon layer residue wherein said photoresist mask protects said exposed portion of said buried contact junction within said semiconductor substrate from said etching completing the formation of said buried contact in the fabrication of an integrated circuit.
Claim 2
Independent Claim 259 words
A method of forming a buried contact in a semiconductor substrate in the fabrication of an integrated circuit comprising: providing a layer of gate silicon oxide over the surface of said semiconductor substrate; depositing a first polysilicon layer overlying said gate silicon oxide layer; etching away said first polysilicon and said gate silicon oxide layers where they are not covered by a buried contact mask to provide an opening to said semiconductor substrate; depositing a second layer of polysilicon over said first polysilicon layer and over said semiconductor substrate within said opening; doping said second polysilicon layer with dopant; driving in said dopant to form a buried contact junction within said semiconductor substrate under said opening; depositing a second layer of silicon oxide overlying said second polysilicon layer; patterning said second oxide and said first and second polysilicon layers to form a polysilicon contact overlying said buried contact junction wherein a portion of said buried contact within said semiconductor substrate is exposed and wherein a portion of said first polysilicon layer other than that of the contact remains as residue; forming a photoresist mask covering said polysilicon contact and extending on either side of said polysilicon contact so that the exposed portion of said buried contact junction within said semiconductor substrate is covered by said photoresist mask; and etching away said first polysilicon layer residue wherein said photoresist mask protects said exposed portion of said buried contact junction within said semiconductor substrate from said etching completing the formation of said buried contact in the fabrication of an integrated circuit.
Claim 3
Dependent Claim 21 words
The method according to claim 1 wherein said first polysilicon layer has a thickness of between about 500 to 600 Angstroms.
Claim 4
Dependent Claim 21 words
The method according to claim 1 wherein said second polysilicon layer has a thickness of between about 2000 to 5000 Angstroms.
Claim 5
Dependent Claim 19 words
The method according to claim 1 wherein said second polysilicon layer is doped by diffusion of POCl 3 .
Claim 6
Dependent Claim 35 words
The method according to claim 1 wherein said second polysilicon layer is doped by ion implant of phosphorus ions with a dosage of between about 1 E 15 to 5 E 15 atoms/cm 3 .
Claim 7
Dependent Claim 35 words
The method according to claim 1 wherein said second polysilicon layer is doped by ion implant of arsenic ions with a dosage of between about 1 E 15 to 5 E 15 atoms/cm 3 .
Claim 8
Dependent Claim 35 words
The method according to claim 1 wherein said second polysilicon layer is doped by ion implant of boron ions with a dosage of between about 1 E 15 to 5 E 15 atoms/cm 3 .
Claim 9
Dependent Claim 36 words
The method according to claim 1 wherein said second polysilicon layer is doped by ion implant of BF 2 ions with a dosage of between about 1 E 15 to 5 E 15 atoms/cm 3 .
Claim 10
Dependent Claim 22 words
The method according to claim 1 wherein said drive-in of said buried contact is performed at between about 850° to 950° C.
Claim 11
Dependent Claim 24 words
The method according to claim 1 wherein said second silicon oxide layer is deposited to a thickness of between about 2000 to 5000 Angstroms.
Claim 12
Dependent Claim 33 words
The method according to claim 1 wherein said photoresist mask is formed using an inverse tone of said buried contact mask wherein said photoresist is patterned to be wider than said polysilicon contact.
Claim 13
Dependent Claim 24 words
The method according to claim 11 wherein said photoresist is patterned to be about 0.2 micrometers wider than said polysilicon contact on either side.
Claim 14
Independent Claim 265 words
A method of forming a buried contact in a semiconductor substrate in the fabrication of a static random access memory (SRAM) integrated circuit comprising: providing a layer of gate silicon oxide over the surface of said semiconductor substrate; depositing a first polysilicon layer overlying said gate silicon oxide layer; etching away said first polysilicon and said gate silicon oxide layers where they are not covered by a buried contact mask to provide an opening to said semiconductor substrate; depositing a second layer of polysilicon over said first polysilicon layer and over said semiconductor substrate within said opening; doping said second polysilicon layer with dopant; driving in said dopant to form a buried contact junction within said semiconductor substrate under said opening; depositing a second layer of silicon oxide overlying said second polysilicon layer; patterning said second oxide and said first and second polysilicon layers to form a polysilicon contact overlying said buried contact junction wherein a portion of said buried contact within said semiconductor substrate is exposed and wherein a portion of said first polysilicon layer other than that of the contact remains as residue; forming a photoresist mask covering said polysilicon contact and extending on either side of said polysilicon contact so that the exposed portion of said buried contact junction within said semiconductor substrate is covered by said photoresist mask; and etching away said first polysilicon layer residue wherein said photoresist mask protects said exposed portion of said buried contact junction within said semiconductor substrate from said etching completing the formation of said buried contact in the fabrication of said SRAM integrated circuit.
Claim 15
Independent Claim 265 words
A method of forming a buried contact in a semiconductor substrate in the fabrication of a static random access memory (SRAM) integrated circuit comprising: providing a layer of gate silicon oxide over the surface of said semiconductor substrate; depositing a first polysilicon layer overlying said gate silicon oxide layer; etching away said first polysilicon and said gate silicon oxide layers where they are not covered by a buried contact mask to provide an opening to said semiconductor substrate; depositing a second layer of polysilicon over said first polysilicon layer and over said semiconductor substrate within said opening; doping said second polysilicon layer with dopant; driving in said dopant to form a buried contact junction within said semiconductor substrate under said opening; depositing a second layer of silicon oxide overlying said second polysilicon layer; patterning said second oxide and said first and second polysilicon layers to form a polysilicon contact overlying said buried contact junction wherein a portion of said buried contact within said semiconductor substrate is exposed and wherein a portion of said first polysilicon layer other than that of the contact remains as residue; forming a photoresist mask covering said polysilicon contact and extending on either side of said polysilicon contact so that the exposed portion of said buried contact junction within said semiconductor substrate is covered by said photoresist mask; and etching away said first polysilicon layer residue wherein said photoresist mask protects said exposed portion of said buried contact junction within said semiconductor substrate from said etching completing the formation of said buried contact in the fabrication of said SRAM integrated circuit.
Claim 16
Dependent Claim 21 words
The method according to claim 13 wherein said first polysilicon layer has a thickness of between about 500 to 600 Angstroms.
Claim 17
Dependent Claim 21 words
The method according to claim 13 wherein said second polysilicon layer has a thickness of between about 2000 to 5000 Angstroms.
Claim 18
Dependent Claim 19 words
The method according to claim 13 wherein said second polysilicon layer is doped by diffusion of POCl 3 .
Claim 19
Dependent Claim 35 words
The method according to claim 13 wherein said second polysilicon layer is doped by ion iplant of phosphorus ions with a dosage of between about 1 E 15 to 5 E 15 atoms/cm 3 .
Claim 20
Dependent Claim 35 words
The method according to claim 13 wherein said second polysilicon layer is doped by ion implant of arsenic ions with a dosage of between about 1 E 15 to 5 E 15 atoms/cm 3 .
Claim 21
Dependent Claim 35 words
The method according to claim 13 wherein said second polysilicon layer is doped by ion implant of boron ions with a dosage of between about 1 E 15 to 5 E 15 atoms/cm 3 .
Claim 22
Dependent Claim 36 words
The method according to claim 13 wherein said second polysilicon layer is doped by ion implant of BF 2 ions with a dosage of between about 1 E 15 to 5 E 15 atoms/cm 3 .
Claim 23
Dependent Claim 22 words
The method according to claim 13 wherein said drive-in of said buried contact is performed at between about 850° to 950° C.
Claim 24
Dependent Claim 24 words
The method according to claim 13 wherein said second silicon oxide layer is deposited to a thickness of between about 2000 to 5000 Angstroms.
Claim 25
Dependent Claim 33 words
The method according to claim 13 wherein said photoresist mask is formed using an inverse tone of said buried contact mask wherein said photoresist is patterned to be wider than said poysilicon contact.
Claim 26
Dependent Claim 24 words
The method according to claim 23 wherein said photoresist is patterned to be about 0.2 micrometers wider than said polysilicon contact on either side.
Claim 27
Independent Claim 278 words
A method of forming a buried contact in a semiconductor substrate in the fabrication of an integrated circuit comprising: providing a layer of gate silicon oxide over the surface of said semiconductor substrate; depositing a first polysilicon layer overlying said gate silicon oxide layer; etching away said first polysilicon and said gate silicon oxide layers where they are not covered by a buried contact mask to provide an opening to said semiconductor substrate; depositing a second layer of polysilicon over said first polysilicon layer and over said semiconductor substrate within said opening; doping said second polysilicon layer with dopant; driving in said dopant to form a buried contact junction within said semiconductor substrate under said opening; depositing a second layer of silicon oxide overlying said second polysilicon layer; patterning said second oxide and said first and second polysilicon layers to form a polysilicon contact overlying said buried contact junction wherein a portion of said buried contact within said semiconductor substrate is exposed and wherein a portion of said first polysilicon layer other than that of the contact remains as residue; forming a photoresist mask covering said polysilicon contact wherein said photoresist mask is formed by using an inverse tone of said buried contact mask wherein said photoresist is patterned to be wider than said polysilicon contact so that the exposed portion of said buried contact junction within said semiconductor substrate is covered by said photoresist mask; and etching away said first polysilicon layer residue wherein said photoresist mask protects said exposed portion of said buried contact junction within said semiconductor substrate from said etching completing the formation of said buried contact in the fabrication of an integrated circuit.
Claim 28
Independent Claim 278 words
A method of forming a buried contact in a semiconductor substrate in the fabrication of an integrated circuit comprising: providing a layer of gate silicon oxide over the surface of said semiconductor substrate; depositing a first polysilicon layer overlying said gate silicon oxide layer; etching away said first polysilicon and said gate silicon oxide layers where they are not covered by a buried contact mask to provide an opening to said semiconductor substrate; depositing a second layer of polysilicon over said first polysilicon layer and over said semiconductor substrate within said opening; doping said second polysilicon layer with dopant; driving in said dopant to form a buried contact junction within said semiconductor substrate under said opening; depositing a second layer of silicon oxide overlying said second polysilicon layer; patterning said second oxide and said first and second polysilicon layers to form a polysilicon contact overlying said buried contact junction wherein a portion of said buried contact within said semiconductor substrate is exposed and wherein a portion of said first polysilicon layer other than that of the contact remains as residue; forming a photoresist mask covering said polysilicon contact wherein said photoresist mask is formed by using an inverse tone of said buried contact mask wherein said photoresist is patterned to be wider than said polysilicon contact so that the exposed portion of said buried contact junction within said semiconductor substrate is covered by said photoresist mask; and etching away said first polysilicon layer residue wherein said photoresist mask protects said exposed portion of said buried contact junction within said semiconductor substrate from said etching completing the formation of said buried contact in the fabrication of an integrated circuit.
Claim 29
Dependent Claim 24 words
The method according to claim 25 wherein said photoresist is patterned to be about 0.2 micrometers wider than said polysilicon contact on either side.
Claim 30
Independent Claim 205 words
A method of forming a buried contact in a semiconductor substrate in the fabrication of an integrated circuit comprising: providing a layer of gate silicon oxide over the surface of said semiconductor substrate; depositing a first polysilicon layer overlying said gate silicon oxide layer; etching away said first polysilicon and said gate silicon oxide layers where they are not covered by a buried contact mask to provide an opening to said semiconductor substrate; depositing a second layer of polysilicon over said first polysilicon layer and over said semiconductor substrate within said opening; doping said second polysilicon layer with dopant; driving in said dopant to form a buried contact junction within said semiconductor substrate under said opening; depositing a second layer of silicon oxide overlying said second polysilicon layer; patterning said second oxide and said first and second polysilicon layers to form a polysilicon contact overlying said buried contact junction wherein a portion of said first polysilicon layer other than that of the contact remains as residue; forming a photoresist mask covering said polysilicon contact and extending on either side of said polysilicon contact; and etching away said first polysilicon layer residue completing the formation of said buried contact in the fabrication of an integrated circuit.
Claim 31
Independent Claim 205 words
A method of forming a buried contact in a semiconductor substrate in the fabrication of an integrated circuit comprising: providing a layer of gate silicon oxide over the surface of said semiconductor substrate; depositing a first polysilicon layer overlying said gate silicon oxide layer; etching away said first polysilicon and said gate silicon oxide layers where they are not covered by a buried contact mask to provide an opening to said semiconductor substrate; depositing a second layer of polysilicon over said first polysilicon layer and over said semiconductor substrate within said opening; doping said second polysilicon layer with dopant; driving in said dopant to form a buried contact junction within said semiconductor substrate under said opening; depositing a second layer of silicon oxide overlying said second polysilicon layer; patterning said second oxide and said first and second polysilicon layers to form a polysilicon contact overlying said buried contact junction wherein a portion of said first polysilicon layer other than that of the contact remains as residue; forming a photoresist mask covering said polysilicon contact and extending on either side of said polysilicon contact; and etching away said first polysilicon layer residue completing the formation of said buried contact in the fabrication of an integrated circuit.
Claim 32
Dependent Claim 33 words
The method according to claim 27 wherein said photoresist mask is formed using an inverse tone of said buried contact mask wherein said photoresist is patterned to be wider than said polysilicon contact.
Claim 33
Dependent Claim 24 words
The method according to claim 27 wherein said photoresist is patterned to be about 0.2 micrometers wider than said polysilicon contact on either side.

References Cited (Backward Citations)

US5063172A Cited
US5350712A Cited
US5272099A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-02-26 1999-08-28 2000-02-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-02-26 2003-08-28 2004-02-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-02-26 2007-08-28 2008-02-27 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag