Method and apparatus for providing a data write signal with a programmable duration

Claim 2

A control system for transferring data between a first bus and a second bus in response to an external first control signal, said first control signal having both an active state of a first duration and an inactive state, said control system comprising: means for receiving said first control signal; means, responsive to said first control signal, for generating a second control signal having an active state of a second duration and an inactive state; one or more delay devices responsive to said first control signal to provide one or more variable durations of said active state of said second control signal; means for selectively varying said second duration of said second control signal by selectively activating said one or more delay devices to provide one or more durations of said active state of said second control signal relatively longer than said first duration of said active state of said first control signal; and means coupled to said first bus and said second bus for enabling data transfer during an active state of said second control signal between said first bus and said second bus.

Claim 3

A control system as recited in claim 1, wherein said enabling means includes one or more drivers.

Claim 4

A control system as recited in claim 1, wherein said enabling means includes means for allowing bidirectional data transfer.

Claim 5

A control system as recited in claim 1, wherein said generating means includes means for initiating said second control signal at substantially the same time as said first control signal.

Claim 6

A control system as recited in claim 1, further including means for selectively disabling said generating means.

Claim 7

A control system for transferring data between a first bus and a second bus in response to an external first control signal, said first control signal having both an active state of a first duration and an inactive state, said control system comprising: means for receiving said first control signal; means, responsive to said first control signal, for generating a second control signal having an active state of a second duration and an inactive state; means for selectively varying said second duration of said second control signal by selectively activating means for providing one or more variable durations of said active state of said second control signal; and means coupled to said first bus and said second bus for enabling data transfer during an active state of said second control signal between said first bus and said second bus, wherein said first bus is a system data bus in a computer system.

Claim 8

A control system for transferring data between a first bus and a second bus in response to an external first control signal, said first control signal having both an active state of a first duration and an inactive state, said control system comprising: means for receiving said first control signal; means, responsive to said first control signal, for generating a second control signal having an active state of a second duration and an inactive state; means for selectively varying said second duration of said second control signal by selectively activating means for providing one or more variable durations of said active state of said second control signal; and means coupled to said first bus and said second bus for enabling data transfer during an active state of said second control signal between said first bus and said second bus, wherein said first bus is a system data bus in a computer system.

Claim 9

A control system for transferring data between a first bus and a second bus in response to an external first control signal, said first control signal having both an active state of a first duration and an inactive state, said control system comprising: means for receiving said first control signal; means, responsive to said first control signal, for generating a second control signal, said second control signal having both an active state of a second duration and an inactive state; one or more delay devices responsive to said first control signal to provide one or more variable durations of said active state of said second control signal; means for selectively varying said second duration of said second control signal by selectively activating a plurality of said delay devices and means for connecting said plurality of delay devices in a plurality of groups, said groups being selectable to provide a plurality of delay periods, said second durations being relatively longer than said first duration of said first control signal; and means coupled to said first bus and said second bus for enabling data transfer during an active state of said second control signal between said first bus and said second bus.

Claim 10

A control system for transferring data between a first bus and a second bus in response to an external first control signal, said first control signal having both an active state of a first duration and an inactive state, said control system comprising: means for receiving said first control signal; means, responsive to said first control signal, for generating a second control signal, said second control signal having both an active state of a second duration and an inactive state; one or more delay devices responsive to said first control signal to provide one or more variable durations of said active state of said second control signal; means for selectively varying said second duration of said second control signal by selectively activating a plurality of said delay devices and means for connecting said plurality of delay devices in a plurality of groups, said groups being selectable to provide a plurality of delay periods, said second durations being relatively longer than said first duration of said first control signal; and means coupled to said first bus and said second bus for enabling data transfer during an active state of said second control signal between said first bus and said second bus.

Claim 11

A control system as provided in claim 7, wherein said delay devices include inverters.

Claim 12

A control system as recited in claim 7, wherein said plurality of delay devices are serially connected and said varying means includes means for selecting groups of serially connected delay devices to provide a plurality of delay periods.

Claim 13

A control system for a computer system which includes a central processing unit (CPU) for enabling data transfer between a first bus and a second bus when said CPU generates a write signal, said control system comprising: means for receiving said write signal from said CPU; means responsive to said write signal for generating a control signal, said control signal having both an active state of a first duration and an inactive state, said control signal being initially enabled at substantially the same time as said write signal; one or more delay devices responsive to said write signal for providing said control signal with an active state of relatively longer duration than said write signal, said longer duration selected by selectively activating said one or more delay devices; and means coupled to said first bus and said second bus for enabling data transfer during an active state of said control signal between said first bus and said second bus in response to said control signal.

Claim 14

A control system for a computer system which includes a central processing unit (CPU) for enabling data transfer between a first bus and a second bus when said CPU generates a write signal, said control system comprising: means for receiving said write signal from said CPU; means responsive to said write signal for generating a control signal, said control signal having both an active state of a first duration and an inactive state, said control signal being initially enabled at substantially the same time as said write signal; one or more delay devices responsive to said write signal for providing said control signal with an active state of relatively longer duration than said write signal, said longer duration selected by selectively activating said one or more delay devices; and means coupled to said first bus and said second bus for enabling data transfer during an active state of said control signal between said first bus and said second bus in response to said control signal.

Claim 15

A control system as recited in claim 10, wherein said enabling means includes means for enabling bidirectional data transfer.

Claim 16

A control system for a computer system which includes a central processing unit (CPU) for enabling data transfer between a first bus and a second bus when said CPU generates a write signal, said control system comprising: means for receiving said write signal from said CPU; means responsive to said write signal for generating a control signal, said control signal having both an active state of a first duration and an inactive state, said control signal being initially enabled at substantially the same time as said write signal; one or more delay devices responsive to said write signal for providing said control signal with an active state of relatively longer duration than said write signal, said longer duration selected by selectively activating said one or more delay devices; and means coupled to said first bus and said second bus for enabling data transfer during an active crane of said control signal between said first bus and said second bus in response to said control signal.

Claim 17

A control system for a computer system which includes a central processing unit (CPU) for enabling data transfer between a first bus and a second bus when said CPU generates a write signal, said control system comprising: means for receiving said write signal from said CPU; means responsive to said write signal for generating a control signal, said control signal having both an active state of a first duration and an inactive state, said control signal being initially enabled at substantially the same time as said write signal; one or more delay devices responsive to said write signal for providing said control signal with an active state of relatively longer duration than said write signal, said longer duration selected by selectively activating said one or more delay devices; and means coupled to said first bus and said second bus for enabling data transfer during an active crane of said control signal between said first bus and said second bus in response to said control signal.

Claim 18

A control system as recited in claim 12, wherein said generating means is programmable for enabling said control signal to be selected by software.

Claim 19

A control system for a computer system which includes a central processing unit (CPU) for enabling data transfer between a first bus and a second bus when said CPU generates a write signal, said control system comprising: means for receiving said write signal from said CPU; means responsive to said write signal for generating a control signal, said control signal having both an active state of a first duration and an inactive state, said control signal being initially enabled at substantially the same time as said write signal; one or more delay devices responsive to said write signal for providing said control signal with an active state of relatively longer duration than said write signal, said longer duration selected by selectively activating said one or more delay devices and means for connecting said one or more delay devices in a plurality of groups; and means coupled to said first bus and said second bus for enabling data transfer during an active state of said control signal between said first bus and said second bus.

Claim 20

A control system for a computer system which includes a central processing unit (CPU) for enabling data transfer between a first bus and a second bus when said CPU generates a write signal, said control system comprising: means for receiving said write signal from said CPU; means responsive to said write signal for generating a control signal, said control signal having both an active state of a first duration and an inactive state, said control signal being initially enabled at substantially the same time as said write signal; one or more delay devices responsive to said write signal for providing said control signal with an active state of relatively longer duration than said write signal, said longer duration selected by selectively activating said one or more delay devices and means for connecting said one or more delay devices in a plurality of groups; and means coupled to said first bus and said second bus for enabling data transfer during an active state of said control signal between said first bus and said second bus.

Claim 21

A control system as recited in claim 14, wherein said plurality of delay devices are serially connected forming said plurality of groups.

Claim 22

A control system as recited in claim 14, wherein said plurality of groups are selectable under program control.

Claim 25

A method as recited in claim 17, wherein said control signal is generated substantially contemporaneously with said write signal.

Claim 26

A control system for transferring data between a first bus and a second bus in response to an external first control signal, said first control signal having both an active state of a first duration and an inactive state, said control system comprising: means for receiving said first control signal; means, responsive to said first control signal, for generating a second control signal having an active state of a second duration and an inactive state; means for selectively varying said second duration of said second control signal; means coupled to said first bus and said second bus for enabling data transfer during an active state of said second control signal between said first bus and said second bus in response to said second control signal; and means for selectively disabling said generating means, wherein said disabling means is programmable.

Claim 27

A control system for transferring data between a first bus and a second bus in response to an external first control signal, said first control signal having both an active state of a first duration and an inactive state, said control system comprising: means for receiving said first control signal; means, responsive to said first control signal, for generating a second control signal having an active state of a second duration and an inactive state; means for selectively varying said second duration of said second control signal; means coupled to said first bus and said second bus for enabling data transfer during an active state of said second control signal between said first bus and said second bus in response to said second control signal; and means for selectively disabling said generating means, wherein said disabling means is programmable.